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Número de pieza | BUT211 | |
Descripción | Silicon Diffused Power Transistor | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de BUT211 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! Philips Semiconductors
Silicon Diffused Power Transistor
Product specification
BUT211
GENERAL DESCRIPTION
Enhanced performance, new generation, high speed switching npn transistor in TO220AB envelope specially suited
for high frequency electronic lighting ballast applications.
QUICK REFERENCE DATA
SYMBOL
VCESM
VCEO
IC
ICM
Ptot
VCEsat
tf
PARAMETER
Collector-emitter voltage peak value
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Inductive fall time
CONDITIONS
VBE = 0 V
Tmb ≤ 25 ˚C
IC = 3.0 A; IB = 0.4 A
ICon = 3.0 A; IBon = 0.3 A
TYP.
-
-
-
-
-
-
-
MAX.
850
400
5
10
100
2.0
0.1
UNIT
V
V
A
A
W
V
µs
PINNING - TO220AB
PIN DESCRIPTION
1 base
2 collector
3 emitter
tab collector
PIN CONFIGURATION
tab
1 23
SYMBOL
c
b
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VCESM
VCEO
IC
ICM
IB
IBM
Ptot
Tstg
Tj
Collector-emitter voltage peak value
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
VBE = 0 V
Tmb ≤ 25 ˚C
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Junction to mounting base
Junction to ambient
CONDITIONS
in free air
MIN.
-
-
-
-
-
-
-
-65
-
MAX.
850
400
5
10
2
4
100
150
150
UNIT
V
V
A
A
A
A
W
˚C
˚C
TYP.
-
-
MAX.
1.25
60
UNIT
K/W
K/W
March 1996
1
Rev 1.100
1 page Philips Semiconductors
Silicon Diffused Power Transistor
Product specification
BUT211
h FE
100
5V
1V
10
Tj = 25 C
Tj = 125 C
1
0.01
Fig.13.
0.1
IC / A
1
10
Typical DC current gain. hFE = f(IC)
parameter VCE
IC / A
100
IC / A
6
5
4
3
2
1
0
0
200 400 600 800 1000
VCE / V
Fig.15. Reverse bias safe operating area. Tj ≤ Tj max
VCC
ICMmax
10
ICmax
1
= 0.01
II
I
0.1
tp =
10 us
100 us
500 us
2 ms
10 ms
DC
IBon
-VBB
LC
VCL
LB
T.U.T.
Fig.16. Test circuit RBSOA. VCC = 150 V; -VBB = 5 V
LC = 200 µH; VCL ≤ 850 V; LB = 1 µH
0.01
1
10 100 1000
VCE / V
Fig.14. Forward bias safe operating area. Tmb = 25˚C
I Region of permissible DC operation.
II Extension for repetitive pulse operation.
NB: Mounted with heatsink compound and
30 ± 5 newton force on the centre of the
envelope.
March 1996
5
Rev 1.100
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet BUT211.PDF ] |
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BUT21BF | Silicon NPN Power Transistor | Inchange Semiconductor |
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