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N55S032 Schematic ( PDF Datasheet ) - nuvoton

Teilenummer N55S032
Beschreibung 32M-BIT Serial MASK ROM
Hersteller nuvoton
Logo nuvoton Logo 




Gesamt 17 Seiten
N55S032 Datasheet, Funktion
N55S032
GENERAL DESCRIPTION
The N55S032 is a 32Mbit (4M Bytes) Serial Mask ROM accessed by a high speed Serial peripheral interface.
KEY FEATURES
Operating voltage ranges from 3.0V to 3.6V
Serial Peripheral Interface compatible-mode 0 and 3
High performance: "fast read" mode at 50MHz and "normal read" at 20MHz
Low power consumption: 8mA for fast read mode or 4mA for normal read mode
Low standby current: 15uA
PIN DESCRIPTION
SYMBOL
SCLK
SI
SO
CSB
HOLDB
VCC
VSS
DESCRIPTION
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Hold to pause the device without
Power Supply
Ground
deselecting the device
ORDER INFORMATION
Part No.
N55S032
Speed
20ns
Grade
Commercial
P/N: PM1437
REV. 1.1, MAR., 2010
1






N55S032 Datasheet, Funktion
N55S032
HOLD FEATURE
HOLD# pin signal goes low to hold any serial communications with the device.
The operation of HOLD requires Chip Select(CS#) to stay low and starts on falling edge of HOLD# pin signal while
Serial Clock (SCLK) signal keeps to be low (if Serial Clock signal does not keep to be low, HOLD operation will not
start until Serial Clock signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while
Serial Clock(SCLK) signal keeps to be low( if Serial Clock signal does not keep to be low, HOLD operation will
not end until Serial Clock being low), Please refer to Figure 2.
Figure 2. Hold Condition Operation
CS#
SCLK
HOLD#
Hold
Condition
(standard)
Hold
Condition
(non-standard)
The Serial Data Output (SO) is a high impedance, that both Serial Data Input (SI) and Serial Clock (SCLK) are
"don't care" during the HOLD operation. If Chip Select (CS#) drives high during HOLD operation, it will reset the in-
ternal logic of the device. To re-start the communication with chip, the HOLD# must be kept as high and CS# must
be kept as low.
P/N: PM1437
REV. 1.1, MAR., 2010
6

6 Page









N55S032 pdf, datenblatt
N55S032
Figure 8. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL
0.8VCC
Input timing referance level
0.7VCC
0.2VCC
0.3VCC
Output timing referance level
AC
Measurement
Level
0.5VCC
Note: The rise and fall time of input pulse < 5ns
Figure 9. OUTPUT LOADING
DEVICE UNDER
TEST
2.7K ohm
+3.3V
CL
6.2K ohm
DIODES=IN3064
OR EQUIVALENT
The condition "CL=30pF" includes jig capacitance
P/N: PM1437
REV. 1.1, MAR., 2010
12

12 Page





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