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PDF NUC240 Data sheet ( Hoja de datos )
| Número de pieza | NUC240 | |
| Descripción | 32-BIT MICROCONTROLLER | |
| Fabricantes | nuvoton | |
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NuMicro NUC230/240 Datasheet
NuMicro™ NUC230/240 Series
DataSheet
The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of NuMicroTM microcontroller based
system design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Technology Corporation.
www.nuvoton.com
Dec. 30, 2014
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NuMicro NUC230/240 Datasheet
8.4.1 12-bit SARADC Specification ...................................................................... 89
8.4.2 LDO and Power Management Specification ..................................................... 89
8.4.3 Low Voltage Reset Specification .................................................................. 90
8.4.4 Brown-out Detector Specification ................................................................. 90
8.4.5 Power-on Reset Specification ..................................................................... 90
8.4.6 Temperature Sensor Specification ................................................................ 91
8.4.7 Comparator Specification........................................................................... 91
8.4.8 USB PHY Specification ............................................................................. 92
8.5 Flash DC Electrical Characteristics...........................................................93
9 PACKAGE DIMENSIONS .................................................................................... 94
9.1 100-pin LQFP (14x14x1.4 mm footprint 2.0 mm)...........................................94
9.2 64-pin LQFP (7x7x1.4 mm footprint 2.0 mm) ...............................................95
9.3 48-pin LQFP (7x7x1.4 mm footprint 2.0 mm) ...............................................96
10REVISION HISTORY............................................................................................ 97
Dec. 30, 2014
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NuMicro NUC230/240 Datasheet
SPI
– Up to four sets of SPI controllers
– The maximum SPI clock rate of Master can up to 36 MHz (chip working at 5V)
– The maximum SPI clock rate of Slave can up to 18 MHz (chip working at 5V)
– Supports SPI Master/Slave mode
– Full duplex synchronous serial data transfer
– Variable length of transfer data from 8 to 32 bits
– MSB or LSB first data transfer
– Rx and Tx on both rising or falling edge of serial clock independently
– Two slave/device select lines in Master mode, and one slave/device select line in Slave
mode
– Supports Byte Suspend mode in 32-bit transmission
– Supports PDMA mode
– Supports three wire, no slave select signal, bi-direction interface
I2C
– Up to two sets of I2C devices
– Master/Slave mode
– Bidirectional data transfer between masters and slaves
– Multi-master bus (no central master)
– Arbitration between simultaneously transmitting masters without corruption of serial data on
the bus
– Serial clock synchronization allowing devices with different bit rates to communicate via one
serial bus
– Serial clock synchronization used as a handshake mechanism to suspend and resume serial
transfer
– Programmable clocks allowing for versatile rate control
– Supports multiple address recognition (four slave address with mask option)
– Supports wake-up function
I2S
– Interface with external audio CODEC
– Operate as either Master or Slave mode
– Capable of handling 8-, 16-, 24- and 32-bit word sizes
– Supports mono and stereo audio data
– Supports I2S and MSB justified data format
– Provides two 8 word FIFO data buffers, one for transmitting and the other for receiving
– Generates interrupt requests when buffer levels cross a programmable boundary
– Supports two DMA requests, one for transmitting and the other for receiving
PS/2 Device
– Host communication inhibit and request to send detection
– Reception frame error detection
– Programmable 1 to 16 bytes transmit buffer to reduce CPU intervention
– Double buffer for data reception
– Software override bus
CAN 2.0
– Supports CAN protocol version 2.0 part A and B
– Bit rates up to 1M bit/s
– 32 Message Objects
– Each Message Object has its own identifier mask
– Programmable FIFO mode (concatenation of Message Object)
– Maskable interrupt
– Disabled Automatic Re-transmission mode for Time Triggered CAN applications
– Support wake-up function
ADC
– 12-bit SAR ADC with 1 MSPS (chip working at 5V)
– Up to 8-ch single-end input or 4-ch differential input
– Single scan/single cycle scan/continuous scan
Dec. 30, 2014
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NUC240.PDF ] | |
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