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L24C256 Schematic ( PDF Datasheet ) - LIZE

Teilenummer L24C256
Beschreibung EEPROM
Hersteller LIZE
Logo LIZE Logo 




Gesamt 15 Seiten
L24C256 Datasheet, Funktion
Shenzhen LIZE Electronic Technology Co., Ltd
SPECIFICATION
L24C128/L24C256/L24C512
Version 1.1
Features
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L24C256 Datasheet, Funktion
Tel:86-755-3680 0780
Website:http://www.lizhiic.com
Fax:86-755-8835 3509
________________________________________________________________________________________________
hardwired input pins. The A2, A1, and A0 pins use an internal proprietary circuit that
biases them to a logic low condition if the pins are allowed to float.
The eighth bit of the device address is the read/write operation select bit. A read operation is
initiated if this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a “0”. If a compare is not made, the
chip will return to a standby state.
NOISE PROTECTION: Special internal circuitry placed on the SDA and SCL pins
prevent small noise spikes from activating the device.
DATA SECURITY: The L24C128/L24C256 has a hardware data protection scheme
that allows the user to write protect the entire memory when the WP pin is at VCC.
4. Write Operations
BYTE WRITE: A write operation requires an 8-bit data word address following the device address
word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a “0”
and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will
output a “0” and the addressing device, such as a microcontroller, must terminate the write
sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle, tWR,
to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not
respond until the write is complete (see Figure 5 on page 8).
PAGE WRITE: The 128K/256K devices are capable of 64-byte page writes.
A page write is initiated the same as a byte write, but the microcontroller does not send a stop
condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of
the first data word, the microcontroller can transmit up to 63 more data words. The EEPROM will
respond with a “0” after each data word received. The microcontroller must terminate the page
write sequence with a stop condition (see Figure 6 on page 8).
The data word address lower six (128K/256K) bits are internally incremented following the receipt
of each data word. The higher data word address bits are not incremented, retaining the memory
page row location. When the word address, internally generated, reaches the page boundary, the
following byte is placed at the beginning of the same page. If more than 64 data words are
transmitted to the EEPROM, the data word address will “roll over” and previous data will be
overwritten.
ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and
the EEPROM inputs are disabled, acknowledge polling can be initiated. This
involves sending a start condition followed by the device address word. The
read/write bit is representative of the operation desired. Only if the internal write
cycle has completed will the EEPROM respond with a “0”, allowing the read or write
sequence to continue.
5. Read Operations
Read operations are initiated the same way as write operations with the exception that the
read/write select bit in the device address word is set to “1”. There are three read operations:
current address read, random address read and sequential read.
CURRENT ADDRESS READ: The internal data word address counter maintains the last address
accessed during the last read or write operation, incremented by one. This address stays valid
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 1.1
Date: 16, Nov. 2013
Page: 6 of 15

6 Page









L24C256 pdf, datenblatt
Tel:86-755-3680 0780
Fax:86-755-8835 3509
Website:http://www.lizhiic.com
________________________________________________________________________________________________
Part Number L 24
XXX - X X X
1 2 3 456
1.Prefix
2.Series Name
24:Two-wire(I2C) Interface
3.EEPROM Density
C128=128K bits
C256=256K bits
4.Package Type
D=DIP
S=SOP
T=TSSOP
5.Temperature Range
I=Ind Temp(-40℃-85℃)
E=Exp Temp(-40℃ -125℃)
6. Packing Type
T=Tube
R=Tape & Reel
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 1.1
Date: 16, Nov. 2013
Page: 12 of 15

12 Page





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