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PDF L24C128 Data sheet ( Hoja de datos )

Número de pieza L24C128
Descripción EEPROM
Fabricantes LIZE 
Logotipo LIZE Logotipo



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No Preview Available ! L24C128 Hoja de datos, Descripción, Manual

Shenzhen LIZE Electronic Technology Co., Ltd
SPECIFICATION
L24C128/L24C256/L24C512
Version 1.1
Features
reservesthe rightto changethis documentationwithout priornotice.

1 page




L24C128 pdf
Tel:86-755-3680 0780
Fax:86-755-8835 3509
Website:http://www.lizhiic.com
________________________________________________________________________________________________
Figure 2. Start and Stop Definition
Figure 3. Output Acknowledge
3. Device Addressing
The 128K/256K/512K EEPROM devices all require an 8-bit device address word following a start
condition to enable the chip for a read or write operation (see to Figure 4 on page 5).
The device address word consists of a mandatory “1”, “0” sequence for the first four most
significant bits as shown. This is common to all the Serial EEPROM devices.
The 128K/256K /512K uses the three device address bits A2, A1, A0 to allow as many
as eight devices on the same bus. These bits must compare to their corresponding
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 1.1
Date: 16, Nov. 2013
Page: 5 of 15

5 Page





L24C128 arduino
Tel:86-755-3680 0780
Fax:86-755-8835 3509
Website:http://www.lizhiic.com
________________________________________________________________________________________________
Stop Setup Time
tSU.STO
0.6
-
-
µs
Data Out Hold Time
tDH 50 -
-
ns
Write Cycle Time
tWR - -
5
ms
5.0V, 25C, Byte Mode
Endurance 1M
-
-
Write Cycles
Bus Timing
Figure 10. SCL: Serial Clock, SDA: Serial Data I/O
Write Cycle Timing
Figure 11. SCL: Serial Clock, SDA: Serial Data I/O
Note: 1. The write cycle time tWR is the time from a valid stop condition of a write
sequence to the end of the internal clear/write cycle.
Ordering Information
Code Number
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 1.1
Date: 16, Nov. 2013
Page: 11 of 15

11 Page







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