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PZT651 Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer PZT651
Beschreibung NPN Silicon Planar Epitaxial Transistor
Hersteller ON Semiconductor
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Gesamt 4 Seiten
PZT651 Datasheet, Funktion
PZT651
NPN Silicon Planar
Epitaxial Transistor
This NPN Silicon Epitaxial transistor is designed for use in
industrial and consumer applications. The device is housed in the
SOT−223 package which is designed for medium power surface
mount applications.
SOT−223 package ensures level mounting, resulting in improved
thermal conduction, and allows visual inspection of soldered joints.
The formed leads absorb thermal stress during soldering, eliminating
the possibility of damage to the die.
Features
High Current
The SOT−223 Package can be Soldered Using Wave or Reflow
PNP Complement is PZT751T1G
S Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current
Total Power Dissipation
@ TA = 25°C (Note 1)
Derate above 25°C
VCEO
VCBO
VEBO
IC
PD
60 Vdc
80 Vdc
5.0 Vdc
2.0 Adc
W
0.8
6.4 mW/°C
Storage Temperature Range
Junction Temperature
THERMAL CHARACTERISTICS
Tstg − 65 to 150 °C
TJ 150 °C
Characteristic
Symbol
Max
Unit
Thermal Resistance from
Junction−to−Ambient in Free Air
RqJA
156 °C/W
Maximum Temperature for Soldering TL 260 °C
Purposes
Time in Solder Bath
10 Sec
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Device mounted on a FR−4 glass epoxy printed circuit board using minimum
recommended footprint.
www.onsemi.com
SOT−223 PACKAGE HIGH CURRENT
NPN SILICON TRANSISTOR
SURFACE MOUNT
4
123
SOT−223
CASE 318E−04
STYLE 1
COLLECTOR 2, 4
BASE
1
EMITTER 3
MARKING DIAGRAM
AYW
651 G
G
1
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping
PZT651T1G
SPZT651T1G
SOT−223
(Pb−Free)
SOT−223
(Pb−Free)
1,000 / Tape & Reel
1,000 / Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
December, 2016 − Rev. 10
1
Publication Order Number:
PZT651T1/D





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