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Teilenummer | MT9HTF6472AY |
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Beschreibung | 512MB DDR2 SDRAM UDIMM | |
Hersteller | Micron | |
Logo | ||
Gesamt 21 Seiten 256MB, 512MB, 1GB (x72, SR, ECC) 240-Pin DDR2 UDIMM
Features
DDR2 SDRAM UDIMM
MT9HTF3272AY – 256MB
MT9HTF6472AY – 512MB
MT9HTF12872AY – 1GB
Features
• 240-pin, unbuffered dual in-line memory module
• Fast data transfer rates: PC2-3200, PC2-4200,
PC2-5300, or PC2-6400
• 256MB (32 Meg x 72), 512MB (64 Meg x 72), or 1GB
(128 Meg x 72)
• VDD = VDDQ 1.8V
• VDDSPD = 1.7–3.6V
• JEDEC-standard 1.8V I/O (SSTL_18-compatible)
• Differential data strobe (DQS, DQS#) option
• 4n-bit prefetch architecture
• Single rank
• Multiple internal device banks for concurrent
operation
• Programmable CAS latency (CL)
• Posted CAS# additive latency (AL)
• WRITE latency = READ latency - 1 tCK
• Programmable burst lengths (BL): 4 or 8
• Adjustable data-output drive strength
• 64ms, 8192-cycle refresh
• On-die termination (ODT)
• Serial presence detect (SPD) with EEPROM
• Gold edge contacts
Figure 1: 240-Pin UDIMM (MO-237 R/C A/F)
Module height 30.0mm (1.18in)
Options
• Operating temperature
– Commercial (0°C ≤ TA ≤ +70°C)
– Industrial (–40°C ≤ TA ≤ +85°C)1
• Package
– 240-pin DIMM (lead-free)
• Frequency/CL2
– 2.5ns @ CL = 5 (DDR2-800)3, 4
– 2.5ns @ CL = 6(DDR2-800)3, 4
– 3.0ns @ CL = 6 (DDR2-667)
– 3.75ns @ CL = 5 (DDR2-53E)
– 5.0ns @ CL = 5 (DDR2-40E)
Marking
None
I
Y
-80E
-800
-667
-53E
-40E
Notes:
1. Contact Micron for industrial temperature
module offerings.
2. CL = CAS (READ) latency.
3. Contact Micron for product availability.
4. Not available in 256MB density.
Table 1: Key Timing Parameters
Speed
Grade
-80E
-800
-667
-53E
-40E
Industry
Nomenclature
PC2-6400
PC2-6400
PC2-5300
PC2-4200
PC2-3200
CL = 6
800
800
–
–
–
Data Rate (MT/s)
CL = 5
CL = 4
800 533
667 533
667 553
– 553
– 400
CL = 3
400
400
400
400
400
tRCD
(ns)
12.5
15
15
15
15
tRP
(ns)
12.5
15
15
15
15
tRC
(ns)
55
55
55
55
55
PDF: 09005aef80e8ad4d
htf9c32_64_128x72ay – Rev. F 3/10 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2003 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
256MB, 512MB, 1GB (x72, SR, ECC) 240-Pin DDR2 UDIMM
Pin Descriptions
Table 7: Pin Descriptions (Continued)
Symbol
SDA
RDQSx,
RDQS#x
Err_Out#
VDD/VDDQ
VDDSPD
VREF
VSS
NC
NF
NU
RFU
Type
I/O
Output
Output
(open drain)
Supply
Supply
Supply
Supply
–
–
–
–
Description
Serial data: Used to transfer addresses and data into and out of the SPD EEPROM on
the I2C bus.
Redundant data strobe (x8 devices only): RDQS is enabled/disabled via the LOAD
MODE command to the extended mode register (EMR). When RDQS is enabled, RDQS
is output with read data only and is ignored during write data. When RDQS is disa-
bled, RDQS becomes data mask (see DMx). RDQS# is only used when RDQS is enabled
and differential data strobe mode is enabled.
Parity error output: Parity error found on the command and address bus.
Power supply: 1.8V ±0.1V. The component VDD and VDDQ are connected to the mod-
ule VDD.
SPD EEPROM power supply: 1.7–3.6V.
Reference voltage: VDD/2.
Ground.
No connect: These pins are not connected on the module.
No function: These pins are connected within the module, but provide no functionality.
Not used: These pins are not used in specific module configurations/operations.
Reserved for future use.
PDF: 09005aef80e8ad4d
htf9c32_64_128x72ay – Rev. F 3/10 EN
6 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2003 Micron Technology, Inc. All rights reserved.
6 Page 256MB, 512MB, 1GB (x72, SR, ECC) 240-Pin DDR2 UDIMM
DRAM Operating Conditions
DRAM Operating Conditions
Recommended AC operating conditions are given in the DDR2 component data sheets.
Component specifications are available on Micron's Web site. Module speed grades cor-
relate with component speed grades.
Table 10: Module and Component Speed Grades
DDR2 components may exceed the listed module speed grades; module may not be available in all listed speed grades
Module Speed Grade
Component Speed Grade
-1GA
-187E
-80E
-25E
-800
-25
-667
-3
-53E
-37E
-40E
-5E
Design Considerations
Simulations
Micron memory modules are designed to optimize signal integrity through carefully de-
signed terminations, controlled board impedances, routing topologies, trace length
matching, and decoupling. However, good signal integrity starts at the system level. Mi-
cron encourages designers to simulate the signal characteristics of the system's memo-
ry bus to ensure adequate signal integrity of the entire memory system.
Power
Operating voltages are specified at the DRAM, not at the edge connector of the module.
Designers must account for any system voltage drops at anticipated power levels to en-
sure the required supply voltage is maintained.
PDF: 09005aef80e8ad4d
htf9c32_64_128x72ay – Rev. F 3/10 EN
12
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2003 Micron Technology, Inc. All rights reserved.
12 Page | ||
Seiten | Gesamt 21 Seiten | |
PDF Download | [ MT9HTF6472AY Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
MT9HTF6472AY | 512MB DDR2 SDRAM UDIMM | Micron |
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