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PDF MI2002M2-1 Data sheet ( Hoja de datos )
| Número de pieza | MI2002M2-1 | |
| Descripción | LCD Module | |
| Fabricantes | MULTI-INNO TECHNOLOGY | |
| Logotipo |  |
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MULTI-INNO TECHNOLOGY CO., LTD.
www.multi-inno.com
LCD MODULE SPECIFICATION
Model : MI2002M2-1
This module uses ROHS material
For Customer's Acceptance:
Customer
Approved
Comment
The standard product specification may change without Revision
prior notice in order to improve performance or quality.
Please contact Multi-Inno for updated specification and Engineering
product status before design for the standard product or Date
release of the order.
Our Reference
1.0
2014-11-21
1 page  
MODULE NO.: MI2002M2-1
EXTERNAL DIMENSIONS
Ver 1.0
MULTI-INNO TECHNOLOGY CO.,LTD.
P.5
5 Page 
MODULE NO.: MI2002M2-1
Ver 1.0
4. Display Control Instruction
Instruction
Instruction Code
Description
ExecutionTime(f
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
osc=270kHz)
Clear
0 0 0 0 0 0 0 0 0 1 Write “20H” to DDRAM set 1.52ms
Display
DDRAM address to “00H” from AC
Return
0 0 0 0 0 0 0 0 1 - Set DDRAM address to “00H” from 1.52ms
Home
AC and return cursor to its original
position if shifted. The contents of
DDRAM are not changed
Entry Mode 0 0 0 0 0 0 0 1 I/D SH Assign cursor moving direction and 38
s
Set enable the shift of entire display
Display
0 0 0 0 0 0 1 D C B Set display (D) cursor(C) and 38
s
ON/OFF
blinking of cursor(B) on/off
Control
Cursor or 0 0 0 0 0 1 S/C R/L - - Set cursor moving and display shift 38
s
Display
control bit, and the direction, without
Shift changing DDRAM data
Function Set 0 0 0 0 1 DL N F - - Set interface data length of display 38
s
line (N: 2line/1line)and, display font
type F:5X11dots/5X8dots
Set CGRAM 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address 38
s
Address
counter
Set 0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address 38
s
DDRAM
counter
Address
Read Busy 0 1
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 Whether during internal operation or 0
s
Flag and
not can be known by reading BF The
Address
contents of address counter of
address counter can also be read
Write Data 1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM 38
s
to RAM
(DDRAM/CGRAM)
Read data 1 1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM 38
s
from RAM
(DDRAM/CGRAM)
Instruction Description
Clear Display
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0000000001
Clear all the display data by writing “20H” (space code) to all DDRAM address, and set DDRAM
address to “00H” into AC(address counter).Return cursor to the original status, namely, bring the
cursor to the left edge on the first line of the display. Make the entry mode increment(I/D=HIGH)
Return Home
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
000000001 -
Set DDRAM address to “00H” into the address counter. Return cursor to its original site and return
display to its original status, if shifted. Contents of DDRAM do not change.
MULTI-INNO TECHNOLOGY CO.,LTD.
P.11
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