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NL10276BC30-38B Schematic ( PDF Datasheet ) - NEC

Teilenummer NL10276BC30-38B
Beschreibung LCD Module
Hersteller NEC
Logo NEC Logo 




Gesamt 30 Seiten
NL10276BC30-38B Datasheet, Funktion
TFT COLOR LCD MODULE
NL10276BC30-38B
38cm (15.0 Type)
XGA
LVDS interface (1port)
PRELIMINARY DATA SHEET
DOD-PP-1169 (2nd edition)
This PRELIMINARY DATA SHEET is updated
document from DOD-PP-1125(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-1169 (2nd edition) 1 © NEC LCD Technologies, Ltd.
Published date: February 2011 CP(N)
2010-2011 All rights reserved.






NL10276BC30-38B Datasheet, Funktion
3. BLOCK DIAGRAM
Host LCD module (Product)
NL10276BC30-38B
D0+ 100Ω
D0-
H-driver
D1+
D1- 100Ω
D2+ 100Ω
D2-
3,072 lines
D3+
D3-
CLK+
CLK-
MSL
100Ω
100Ω
LCD panel
H: 1,024 × 3 (R, G, B)
V: 768
GND
Note1
Note2
VCC
FG
Note1
Note2
Fuse
Power supply
for gradation
DC/DC
converter
LCD panel signal processing board
Backlight (Edge light type)
VBLH
VBLC
Note1
VBLH
VBLC
Note1
1 lamp
1 lamp
Note1: Relations between GND (Signal ground), FG (Frame ground) and VBLC (Lamp low voltage
terminal) in the LCD module are as follows.
GND – FG
Connected
GND - VBLC
Not connected
FG - VBLC
Not connected
Note2: GND and FG must be connected to customer equipment's ground, and it is recommended that
GND, FG and customer inverter ground be connected together in customer equipment.
PRELIMINARY DATA SHEET DOD-PP-1169 (2nd edition)
6

6 Page









NL10276BC30-38B pdf, datenblatt
NL10276BC30-38B
4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS
4.5.1 LCD panel signal processing board
CN1 socket (LCD module side): DF14H-20P-1.25H (Hirose Electric Co., Ltd. (HRS))
Adaptable plug:
DF14-20S-1.25C (Hirose Electric Co., Ltd. (HRS))
Pin No. Symbol
Signal
Remarks
1 VCC
2 VCC
Power supply
Note1
3 GND
4 GND
Ground
Note1
5 D0-
6 D0+
Pixel data
Note2
7 GND
Ground
Note1
8 D1-
9 D1+
Pixel data
Note2
10 GND
Ground
Note1
11 D2-
12 D2+
Pixel data
Note2
13 GND
Ground
Note1
14 CLK-
15 CLK+
Pixel clock
Note2
16 GND
Ground
Note1
17 D3-
18 D3+
Pixel data
Note2
19 RSVD
Reserved
Keep this pin open.
20 MSL
Selection of LVDS input map
High:
Input map A
Low or Open: Input map B
Note3, Note4
Note1: All GND and VCC terminals should be used without any non-connected lines.
Note2: Twist pair wires with 100Ω (Characteristic impedance) should be used between LCD panel
signal processing board and LVDS transmitter.
Note3: See "4.5.4 Connection between receiver and transmitter for LVDS".
Note4: This terminal is pulled-down in the product. (Pull-down resistance: 50kΩ)
PRELIMINARY DATA SHEET DOD-PP-1169 (2nd edition)
12

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