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PDF TM070DVHG01 Data sheet ( Hoja de datos )
| Número de pieza | TM070DVHG01 | |
| Descripción | TFT+TP MODULE | |
| Fabricantes | Tianma | |
| Logotipo |  |
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Model No.TM070DVHG01
MODEL NO. :
ISSUED DATE:
VERSION :
TM070DVHG01
2015-02-02
V1.4
■Preliminary Specification
□Final Product Specification
Customer :
Approved by
Notes
TIANMA Confirmed :
Prepared by
Checked by
Approved by
This technical specification is subjected to change without notice
The information contained herein is the exclusive property of TIANMA MICRO-ELECTRONICS Corporation
and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of
TIANMA MICRO-ELECTRONICS Corporation.
Page 1 of 27
1 page  
Model No.TM070DVHG01
2 Input/Output Terminals
2.1 TFT CN1 pin assignment
Pin No. Symbol I/O
1
VCOM
P
2
VDD
P
3
VDD
P
4 NC ---
5
Reset
I
6
STBYB
I
7
GND
P
8
RXIN0-
I
9
RXIN0+
I
10
GND
P
11
RXIN1-
I
12
RXIN1+
I
13
GND
P
14
RXIN2-
I
15
RXIN2+
I
16
GND
P
17 RXCLKIN- I
18 RXCLKIN+ I
19
GND
P
20
RXIN3-
I
21
RXIN3+
I
22
GND
P
23 NC ---
24 NC ---
25
GND
P
26 NC ---
27
DIMO
O
28
SELB
I
29
AVDD
P
30
GND
P
31
LED-
P
32
LED-
P
33 L/R P
34 U/D P
35
VGL
---
36 CABCEN1 ---
function
Common Voltage
Power Voltage for digital circuit
Power Voltage for digital circuit
No connection
Global reset pin
Standby mode, Normally pulled high
Ground
- LVDS differential data input
+LVDS differential data input
Ground
-LVDS differential data input
+LVDS differential data input
Ground
-LVDS differential data input
+LVDS differential data input
Ground
-LVDS differential clock input
+LVDS differential clock input
Ground
-LVDS differential data input
+LVDS differential data input
Ground
No connection
No connection
Ground
No connection
Backlight CABC controller signal
output
6bit/8bit mode select
Power for Analog Circuit
Ground
LED Cathode
LED Cathode
Horizontal inversion
Vertical inversion
Gate OFF Voltage
CABC H/W enable
Remarks
Active Low to enter Reset State
STBYB=‖1‖,Normally operation
STBYB=‖0‖,Timing controller,
source driver will turn off, all
output are High-Z
Normally Pull High
Note 2
L/R=1, from left to right;
L/R=0, from right to left
U/D=0, from up to down;
U/D=1, from down to up.
Note 3
The information contained herein is the exclusive property of TIANMA MICRO-ELECTRONICS Corporation
and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of
TIANMA MICRO-ELECTRONICS Corporation.
Page 5 of 27
5 Page 
5 Timing Chart
5.1 AC Electrical Characteristics
Model No.TM070DVHG01
Parameter
Clock Frequency
Input data skew margin
Clock high time
Clock low time
PLL wake-up time
Symbol Min
Typ
RxFCLK
TRSKM
TLVCH
TLVCL
TenPLL
40.8
500
–
–
–
51.2
–
4/(7* RxFCLK)
3/(7* RxFCLK)
–
Max
71
–
–
–
150
Unit
MHz
ps
ns
ns
us
Conditions
The information contained herein is the exclusive property of TIANMA MICRO-ELECTRONICS Corporation
and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of
TIANMA MICRO-ELECTRONICS Corporation.
Page 11 of 27
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet TM070DVHG01.PDF ] | |
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