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GA05JT12-263 Schematic ( PDF Datasheet ) - GeneSiC

Teilenummer GA05JT12-263
Beschreibung Junction Transistor
Hersteller GeneSiC
Logo GeneSiC Logo 




Gesamt 9 Seiten
GA05JT12-263 Datasheet, Funktion
GA05JT12-263
 
Normally – OFF Silicon Carbide
Junction Transistor
Features
Package
VDS
RDS(ON)
ID
= 1200 V
= 260 mΩ
= 5A
175 °C maximum operating temperature
Temperature independent switching performance
Gate oxide free SiC switch
Suitable for connecting an anti-parallel diode
Positive temperature coefficient for easy paralleling
Low gate charge
Low intrinsic output capacitance
RoHS Compliant
D
DS
G
D
G
S
TO-263
Advantages
 
Applications
SiC transistor most compatible with existing Si gate-drivers
Low switching losses
Higher efficiency
High temperature operation
High short circuit withstand capability
Absolute Maximum Ratings
Down Hole Oil Drilling, Geothermal Instrumentation
Hybrid Electric Vehicles (HEV)
Solar Inverters
Switched-Mode Power Supply (SMPS)
Power Factor Correction (PFC)
Induction Heating
Uninterruptible Power Supply (UPS)
Motor Drives
Parameter
Drain – Source Voltage
Continuous Drain Current
Gate Peak Current
Turn-Off Safe Operating Area
Short Circuit Safe Operating Area
Reverse Gate – Source Voltage
Reverse Drain – Source Voltage
Power Dissipation
Storage Temperature
Symbol
VDS
ID
IGM
RBSOA
SCSOA
VSG
VSD
Ptot
Tstg
Conditions
VGS = 0 V
TC = 150°C
TVJ = 175 oC, IG = 0.25 A,
Clamped Inductive Load
TVJ = 175 oC, IG = 1.5 A, VDS = 70 V,
Non Repetitive
TC = 150 °C
Value
1200
5
5
ID,max = 5
@ VDS VDSmax
20
30
25
17.7
-55 to 175
Unit
V
A
A
A
Notes
Fig. 19
Fig. 16
µs
V
V
W Fig. 14
°C
Electrical Characteristics
Parameter
On State Characteristics 
Drain – Source On Resistance
Gate Forward Voltage
DC Current Gain
Off State Characteristics 
Drain Leakage Current
Gate Leakage Current
 
Symbol
Conditions
Min.
Value
Typical
Max. Unit
Notes
RDS(ON)
VGS(FWD)
β
ID = 5 A, Tj = 25 °C
ID = 5 A, Tj = 125 °C
ID = 5 A, Tj = 175 °C
IG = 500 mA, Tj = 25 °C
IG = 500 mA, Tj = 175 °C
VDS = 5 V, ID = 5 A, Tj = 25 °C
VDS = 5 V, ID = 5 A, Tj = 125 °C
VDS = 5 V, ID = 5 A, Tj = 175 °C
260
368 mFig. 5
455
3.06
2.79
V Fig. 4
80
60 – Fig. 5
55
VR = 1200 V, VGS = 0 V, Tj = 25 °C
<1
IDSS VR = 1200 V, VGS = 0 V, Tj = 125 °C 1 μA Fig. 6
VR = 1200 V, VGS = 0 V, Tj = 175 °C
2
ISG VSG = 20 V, Tj = 25 °C
20 nA
 
Jun 2014
http://www.genesicsemi.com/commercial-sic/sic-junction-transistors/
Pg1 of 8 






GA05JT12-263 Datasheet, Funktion
GA05JT12-263
 
Commercial Gate Drivers Compatible with GA05JT12-263
Features
Manufacturer
IXYS
Avago Tech.
Avago Tech.
Concept
IXYS
IXYS
IXYS
IXYS
Micrel
Part Number
IX2204
HCPL-316J
HCPL-322J
1SC2060P
IXD_604
IXD_614
IXD_630
IRFD630
MIC4452YN
Optical Signal
Isolation
4
Desaturation
Detection
Active Miller
Gate Clamping3
High Side
Capability
4
Number of
Outputs
2
1
1
1
2
1
1
1
1
Microsemi
LX4510
– – –1
Texas Instruments UCC27322 – – – 1
3 – Active Miller Gate Clamping recommended for VEE = GND switching applications as SJT and/or output BJT secondary gate discharge path.
4 – Features built-in galvanic signal and supply voltage isolation, replaces optical isolation on signal.
5 – Specialized for high-temperature operation of gate drive circuitry.
Silicon IGBT/MOSFET gate drivers (see partial list above) typically offer sufficient gate currents to drive the GA05JT12-263. Specific product
information should be obtained from the individual product manufacturers.
The GA05JT12-263 can be driven similar to silicon IGBTs or MOSFETs in which a gate driver IC is used to supply positive gate current peaks
to the device at turn-on and negative current peaks at turn-off. Unlike the IGBT or MOSFET, the GA05JT12-263 also requires a continuous
gate current for the device to remain on after the initial current peak. An example gate current waveform for the GA05JT12-263 is shown in
Fig. 16.
Single-Level SJT Gate Drive
Producing the necessary gate current peaks and continuous currents can be accomplished by using a gate drive circuit shown in Fig. 17. The
gate driver output node is connected to an optional NPN/PNP silicon BJT pair in a totem pole configuration which may provide higher gate
current to the SJT gate. The NPN/PNP pair are controlled by the gate drive IC connected through base resistor Rb. The pair’s output at node
N1 is connected to gate resistor RG(EXT) and capacitor CG located in parallel and connected to the SJT gate terminal. The gate resistor
determines the continuous gate current. The gate capacitor produces positive and negative current peaks, which enable fast charging and
discharging of the SJT’s terminal capacitances. Additional detail on the single-level SJT gate driving technique is discussed in GeneSiC
Semiconductor Application Note AN-10A. (http://www.genesicsemi.com/references/product-notes)
Figure 17: Single-Level SJT Gate Diver Configuration (External signal isolation recommended for non-isolated gate driver ICs.)
Single-Level Gate Drive Conditions
Values
Parameter
Symbol
Conditions
Range
Typical
Peak SJT
Performance6
Supply Voltage
Negative Supply Voltage
Output Current, Peak
Output Current, Continuous
Output Gate Components
VCC
VEE
IOUT, pk
IOUT
Package Limited
Package Limited, T = 175°C
6 – 30
-10 – GND
0.7 – 3
0.1 – 1.0
15 – 18
-5
0.75
0.25
25
-5
1
0.3
Gate Resistance, External
Gate Capacitance
Output BJT Buffer (Optional)
RG(EXT)
CG
Q1, Q2
VCC = 20 V, IG 0.5 A, T = 175°C
20
VCC = 20 V, IG,pk 2.0 A, T = 175°C
5 – 30
10
2N6107/2N6292 pair or equivalent7
20
10
6 – Achieves lowest SJT device energy losses (Etot) and fastest switching times (tr, tf).
7 – Representative complimentary BJT pair with IC 5 A and VCEO 60 V.
Units
V
V
A
A
nF
Jun 2014
http://www.genesicsemi.com/commercial-sic/sic-junction-transistors/
Pg6 of 8 

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