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PDF TW2851 Data sheet ( Hoja de datos )

Número de pieza TW2851
Descripción 4 Channel A/V Decoder
Fabricantes Intersil 
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4 Channel A/V Decoder with Multiplexer/VGA/
LCD Display Processor for Security Applications
TW2851
The TW2851 is a fully integrated A/V decoder,
multiplexer, and display processor chip. It has eight
CVBS analog inputs fed into four internal high
quality NTSC/PAL video decoders. It has four digital
input ports supporting various type of input format,
including four BT 656 inputs, two BT 601 inputs, or
one 1120 playback input. It has one optional VGA
display controller or LCD panel controller, two CVBS
display, one digital SPOT output, two digital
recorder outputs, and one digital display output.
Every output has its associated graphic overlay
function that displays bitmap for OSG, single box,
2D array box, borders, privacy mask, and mouse
cursor.
The four built-in video decoders include four anti-
aliasing filters, 10bit Analog-to-Digital converters,
proprietary digital gain/clamp controller, and high
quality Y/C separator to reduce cross-noise.
Associated with each video decoder, there are built-
in motion, blind, and night detectors to provide
alarm signals, a noise reducer to reduce the
impulse noise, and 3 sets of downscalers to
provide proper video size into the display, record,
and SPOT multiplexers.
The TW2851 MUX function selects video inputs
from any video decoder/ digital inputs to any of
recording / SPOT / VGA display / CVBS display
outputs flexibly. The recording multiplexer supports
frame / field and byte-interleaved multi-channel
video streams in the format of BT 656, BT 1120 to
interface with external video compression CODEC.
The frame / field allocation of each channel can be
flexibly configurable in the multi-channel video
stream. The multi-channel video stream features
built-in channel ID to identify channels of interest
for the CODEC or playback module to properly de-
multiplex the multi-channel stream into single
channel streams. The motion / night / blind
detection information are also embedded as part of
the channel ID.
The display multiplexer displays up to 8 video
windows, with 4 for video decoders and 4 for either
digital interface or video decoder interface to
support pseudo 8 channel inputs. The location and
size of each of the 8 display windows are flexibly
configurable. The multiplexed display video is sent
to both VGA / LCD and the CVBS output
simultaneously. Before the VGA / LCD output, there
is a 2D de-interlacer converting the interlaced video
into progressive for any PC monitor / LCD panel
with resolution up to WXGA+ (1440x900)
resolution. The VGA interface provides RGB
component with both analog output through 3
embedded DACs and digital TTL outputs. The LVDS
interface provides single or dual channel output to
drive various TFT LCD panels.
The SPOT multiplexer functions as a either SPOT
display or a secondary record mux. It supports
single D1 frame rate output. When used as display
purpose, it is capable of supporting 1 / 4 windows
in a fixed configuration. When used as record mux
purpose, it is capable of supporting quad window or
frame / field interleave multi-channel stream in
single D1 frame rate.
There are two built-in video encoders features two
10-bit embedded DACs to provide 2 CVBS outputs.
The two video encoders are flexibly configurable to
output any two of the display, SPOT and record path
video content.
The TW2851 also includes an audio CODEC with
five audio Analog-to-Digital converters and one
Digital-to-Analog converter. A built-in audio
multiplexer generates digital outputs for recording /
mixing and accepts digital input for playback.
TW2851 features a cascade function to allow up to
4 TW2851 chips to connect together to increase the
total number of channels / windows supported in
VGA display and SPOT display. With 4 chips
cascaded together, the VGA display path can
display up to 32 display windows, and the SPOT
display can display up to 16 windows.
Analog Video Decoder
4 sets of video decoder accept all
NTSC(M/N/4.43) / PAL
(B/D/G/H/I/K/L/M/N/60) standards with auto
detection
8 CVBS analog inputs for pseudo 8 channel
support
Integrated video analog anti-aliasing filters and 10
bit CMOS ADCs for each video decoder
High performance adaptive 4H comb filters for all
NTSC/PAL standards
August 17, 2012
FN7743.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC. 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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TW2851 pdf
TW2851
Table of Contents
Analog Video Decoder........................................................................... 1
Digital Input Ports.................................................................................... 2
Analog/Digital VGA Display.................................................................. 2
TFT LCD Panel Support ........................................................................ 2
Display CVBS Output............................................................................. 2
Display Multiplexer ................................................................................. 2
Record Multiplexer.................................................................................. 2
SPOT Multiplexer.................................................................................... 3
Dual Video Encoders............................................................................. 3
Cascade Capability................................................................................. 3
Audio CODEC.......................................................................................... 3
External DDR SDRAM............................................................................ 3
Host Interface........................................................................................... 3
System Clock........................................................................................... 3
Package .................................................................................................... 3
Ordering Information ...................................................................... 4
Table of Contents ............................................................................ 5
Table of Figures ............................................................................... 7
Table List .......................................................................................... 9
Pin Diagram.................................................................................... 10
TW2851 (352 BGA) ...............................................................................10
Pin Descriptions ............................................................................ 11
Analog Interface....................................................................................11
Digital VGA / LVDS Interface...............................................................12
Host Interface.........................................................................................14
Audio Digital Interface..........................................................................15
Digital Input Interface ...........................................................................16
Digital Output Interface........................................................................17
DDR SDRAM Interface.........................................................................18
Misc Interface.........................................................................................19
Power / Ground Interface ....................................................................20
Functional Description ................................................................. 22
CVBS Video Input.................................................................................23
Formats ...............................................................................................23
Analog Front-End...............................................................................23
Decimation Filter.................................................................................24
AGC and Clamping............................................................................25
Sync Processing.................................................................................25
Y/C Separation ...................................................................................25
Color Decoding...................................................................................25
Chrominance Processing..................................................................27
Luminance Processing......................................................................27
Pseudo 8 Channels............................................................................28
Cropping Function..............................................................................28
Noise Reduction.................................................................................29
Downscalers ....................................................................................... 29
Motion Detection.................................................................................29
Blind Detection....................................................................................33
Night Detection ...................................................................................34
Digital Video Input.................................................................................34
ITU-R BT. 656 Digital Video Input Format........................................34
ITU-R BT. 601 Digital Video Input Format........................................36
ITU-R BT. 1120 Digital Video Input Format.....................................36
Multi-Channel Video Format..............................................................36
Playback Input Channel De-multiplexer...........................................38
Channel ID Decoder ..........................................................................40
Cropping and Scaling Function.........................................................40
Video Multiplexers................................................................................41
Capture Control ..................................................................................41
Read Control.......................................................................................43
Window Configuration........................................................................46
Video Window Control.......................................................................46
Image Enhancement Processing.....................................................47
Video Output..........................................................................................49
Analog VGA/RGB Video Output.......................................................49
CVBS Video Output...........................................................................49
Digital Output.......................................................................................53
TFT Panel Support.............................................................................56
Video Cascade.......................................................................................56
Display Path........................................................................................57
SPOT Path..........................................................................................57
Channel ID..............................................................................................59
Channel ID Types...............................................................................59
Channel ID Encoding Setting............................................................61
Channel ID Decoding Setting............................................................62
Digital Channel ID Format..................................................................63
OSG..........................................................................................................66
Video Border Layer.............................................................................66
2-Dimensional Arrayed Box...............................................................67
Bitmap Layer.......................................................................................68
Single Box...........................................................................................71
Mouse Pointer.....................................................................................71
Audio Codec ..........................................................................................73
Audio Clock Master/Slave mode.......................................................74
Audio Detection...................................................................................75
Audio Multi-Chip Cascade.................................................................75
Serial Audio Interface .........................................................................78
Audio Clock Slave Mode Data Output Timing.................................81
ACLKP/ASYNP Slave Mode Data Output Timing..........................82
Audio Clock Generation.....................................................................84
Audio Clock Auto Setup.....................................................................86
Host Interface.........................................................................................87
Serial Interface ....................................................................................89
Parallel Interface .................................................................................90
VGA DDC I2C Master Interface........................................................93
PS2 Mouse Interface..........................................................................94
Interrupt Interface................................................................................94
Burst Interface to DDR SDRAM........................................................94
External DRAM Interface.....................................................................95
Chip Reset / Initiation............................................................................95
Frequency Synthesizer Setup............................................................96
Register Description By Function............................................... 97
CVBS Video Input .................................................................................97
Video Decoder....................................................................................97
Internal Pattern Generator ...............................................................120
Noise Reduction...............................................................................121
Downscaler .......................................................................................123
Motion / Blind / Night Detection........................................................126
Digital Input Interface..........................................................................132
656 / 601 / RGB Port........................................................................132
CHID Decode / Strobe.....................................................................136
Playback Cropping...........................................................................144
Playback Downscalers.....................................................................146
Video Multiplexers ..............................................................................147
Record Control..................................................................................147
Record Switch Queue......................................................................150
Record CHID Encoder.....................................................................152
Display Control..................................................................................154
SPOT Control ...................................................................................161
SPOT Switch Queue........................................................................164
SPOT CHID Encoder.......................................................................166
Display CVBS Processing ................................................................169
Down-Scaling....................................................................................169
Display VGA / LCD Processing........................................................171
Up-Scaling.........................................................................................174
Gamma Table...................................................................................175
2D De-interlace.................................................................................175
Image Enhancement........................................................................176
Video Output........................................................................................179
Record CVBS Timing.......................................................................179
SPOT CVBS Timing........................................................................180
Display CVBS Timing.......................................................................181
CVBS Encoder Control....................................................................183
Display Cascade Timing..................................................................186
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TW2851 arduino
Pin Descriptions
Analog Interface
NAME
PIN #
VIN1A
VIN1B
VIN2A
VIN2B
VIN3A
VIN3B
VIN4A
VIN4B
AIN1
AIN2
AIN3
AIN4
AIN5
AINN
AOUT
VAOX
VAOS
VAOXR
VAOXG
VAOXB
RTERM
M2
M3
N2
N3
P2
P3
R2
R3
U2
U3
V1
V2
V3
T3
T2
W2
W3
AA2
AA3
AB2
Y4
TW2851
TYPE
DESCRIPTION
A Composite video input A of channel 1.
A Composite video input B of channel 1.
A Composite video input A of channel 2.
A Composite video input A of channel 2.
A Composite video input A of channel 3.
A Composite video input B of channel 3.
A Composite video input A of channel 4.
A Composite video input B of channel 4.
A Audio input of channel 1.
A Audio input of channel 2.
A Audio input of channel 3.
A Audio input of channel 4.
A Audio input of channel 5.
A AINN
A Audio mixing output.
A Display CVBS analog video output.
A SPOT CVBS analog video output.
A Display output R signal
A Display output G signal
A Display output B signal
A R Termination
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