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PDF 74AHC126 Data sheet ( Hoja de datos )
| Número de pieza | 74AHC126 | |
| Descripción | QUADRUPLE 3-STATE BUFFERS OE HIGH | |
| Fabricantes | Diodes | |
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74AHC126
QUADRUPLE 3-STATE BUFFERS OE HIGH
Description
The 74AHC126 provides provides four independent buffer gates with
3-state outputs. Each buffer has a separate enable pin that when
driven with a low logic level places the corresponding output in the
high impedance state. The device is designed for operation with a
power supply range of 2.0V to 5.5V. The inputs are tolerant to 5.5V
allowing this device to be used in a mixed voltage environment.
Pin Assignments
Features
• Wide Supply Voltage Range from 2.0V to 5.5V
• Outputs Sink or Source 8mA at VCC = 4.5V
• CMOS Low Power Consumption
• Schmitt Trigger Action at All Inputs
• Inputs can be driven by 3.3V or 5.5V allowing for voltage
translation applications.
• ESD Protection Exceeds JESD 22
200-V Machine Model (A115-A)
2000-V Human Body Model (A114-A)
Exceeds 1000-V Charged Device Model (C101C)
• Latch-Up Exceeds 250mA per JESD 78, Class II
• Range of Package Options SO-14 and TSSOP-14
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
Applications
• General Purpose Logic
• Wide array of products such as:
PCs, Networking, Notebooks, Netbooks
Computer Peripherals, Hard Drives, CD/DVD ROM
TV, DVD, DVR, Set Top Box
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
Click here for ordering information, located at the end of datasheet
74AHC126
Document number: DS35346 Rev. 3 - 2
1 of 9
www.diodes.com
January 2013
© Diodes Incorporated
1 page  
Parameter Measurement Information
74AHC126
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
Vload
GND
VCC
3.3V±0.3V
5V±0.5V
Inputs
VI tr/tf
3 V ≤3ns
VCC ≤3ns
VM
VCC/2
VCC/2
VLOAD
VCC
VCC
CL
15,50 pF
15,50 pF
RL
1KΩ
1KΩ
V∆
0.3 V
0.3 V
Voltage Waveform Pulse Duration
Voltage Waveform Enable and Disable Times
Low and High Level Enabling
Voltage Waveform Propagation Delay Times
Inverting and Non Inverting Outputs
Figure 1. Load Circuit and Voltage Waveforms
Notes:
A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate ≤ 1 MHz.
C. Inputs are measured separately one transition per measurement.
D. tPLZ and tPHZ are the same as tdis.
E. tPZL and tPZH are the same as tEN0.
F. tPLH and tPHL are the same as tPD.
74AHC126
Document number: DS35346 Rev. 3 - 2
5 of 9
www.diodes.com
January 2013
© Diodes Incorporated
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74AHC126.PDF ] | |
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