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PDF ADM7151 Data sheet ( Hoja de datos )

Número de pieza ADM7151
Descripción RF Linear Regulator
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
800 mA Ultralow Noise,
High PSRR, RF Linear Regulator
ADM7151
FEATURES
Input voltage range: 4.5 V to 16 V
Maximum output current: 800 mA
Adjustable output from 1.5 V to 5.1 V
Low noise
1.0 μV rms total integrated noise from 100 Hz to 100 kHz
1.6 μV rms total integrated noise from 10 Hz to 100 kHz
Noise spectral density: 1.7 nV√Hz from 10 kHz to 1 MHz
Power supply rejection ratio (PSRR) at 400 mA load
>90 dB from 1 kHz to 100 kHz, VOUT = 5 V
>60 dB at 1 MHz, VOUT = 5 V
Dropout voltage: 0.6 V at VOUT = 5 V, 800 mA load
Initial voltage accuracy: ±1%
Voltage accuracy over line, load and temperature: ±2%
Quiescent current (IGND): 4.3 mA at no load
Low shutdown current: 0.1 μA
Stable with a 10 μF ceramic output capacitor
8-lead LFCSP package and 8-lead SOIC package
APPLICATIONS
Regulated power noise sensitive applications
RF mixers, phase-locked loops (PLLs), voltage-controlled
oscillators (VCOs), and PLLs with integrated VCOs
Clock distribution circuits
Ultrasound and other imaging applications
High speed RF transceivers
High speed, 16-bit or greater ADCs
Communications and infrastructure
Cable digital-to-analog converter (DAC) drivers
GENERAL DESCRIPTION
The ADM7151 is a low dropout (LDO) linear regulator that
operates from 4.5 V to 16 V and provides up to 800 mA of output
current. Using an advanced proprietary architecture, it provides
high power supply rejection (>90 dB from 1 kHz to 1 MHz),
ultralow noise (1.7 nV√Hz from 10 kHz to 1 MHz), and excellent
line and load transient response with a 10 μF ceramic output
capacitor. The output voltage can be set to any voltage between
1.5 V and 5.1 V with two resistors.
The ADM7151 is available in two models that optimize power
dissipation and PSRR performance as a function of input and
output voltage. See Table 6 and Table 7 for selection guides.
The ADM7151 regulator output noise is 1.0 μV rms from
100 Hz to 100 kHz, and the noise spectral density is 1.7 nV/√Hz
from 10 kHz to 1 MHz.
The ADM7151 is available in 8-lead, 3 mm × 3 mm LFCSP and
8-lead SOIC packages, making it not only a very compact solution,
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUIT
ADM7151-04
VIN = 6.2V
ON
CIN
10µF
OFF VBYP
CBYP
1µF
VIN
EN
BYP
VOUT
REF
REF_SENSE
VOUT = 5.0V
COUT
10µF
CREF
1µF
R1
VOUT = 1.5V × (R1 + R2)/R2
VREG
CREG
10µF
VREG
GND
R2
1k< R2 < 200k
Figure 1. ADM7151-04 with VOUT = 5 V
but also providing excellent thermal performance for applications
requiring up to 800 mA of output current in a small, low profile
footprint.
100k
10k
CBYP = 1µF
CBYP = 10µF
CBYP = 100µF
CBYP = 1mF
1k
100
10
1
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 2. Noise Spectral Density (NSD) vs. Frequency for Various CBYP
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




ADM7151 pdf
ADM7151
Data Sheet
Parameter
VREG5 UNDERVOLTAGETHRESHOLDS
VREG Rise
VREG Fall
Hysteresis
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Logic Hysteresis
EN Input Leakage Current
Symbol
Test Conditions/Comments
VREGUVLORISE
VREGUVLOFALL
VREGUVLOHYS
ENHIGH
ENLOW
ENHYS
IEN-LKG
TJ = −40°C to +125°C
TJ = −40°C to +125°C
4.5 V ≤ VIN ≤ 16 V
VIN = 5 V
VEN = VIN or GND
Min Typ Max Unit
3.1
2.55
210
V
V
mV
3.2 V
0.8 V
225 mV
0.1 1.0 µA
1 Based on an end-point calculation using 1 mA and 800 mA loads. See Figure 6 and Figure 13 for typical load regulation performance for loads less than 1 mA.
2 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V, or 4.5 V.
3 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to achieve the nominal output voltage. Dropout applies only for
output voltages above 4.5 V.
4 Start-up time is defined as the time between the rising edge of VEN to VOUT, VREG, or VREF being at 90% of its nominal value.
5 The output voltage is turned off until the VREG UVLO rise threshold is crossed. The VREG output is turned off until the input voltage UVLO rising threshold is crossed.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
CAPACITANCE
Minimum Input1
Minimum Regulator1
Minimum Output1
Minimum Bypass
Minimum Reference
CAPACITOR EQUIVALENT SERIES RESISTANCE (ESR)
CREG, COUT, CIN, CREF
CBYP
Symbol
CIN
CREG
COUT
CBYP
CREF
RESR
Test Conditions/Comments
TA = −40°C to +125°C
TA = −40°C to +125°C
Min Typ Max Unit
7.0 µF
7.0 µF
7.0 µF
0.1 µF
0.7 µF
0.001
0.001
0.2 Ω
2.0 Ω
1 The minimum input, regulator, and output capacitance must be greater than 7.0 µF over the full range of operating conditions. The full range of operating conditions
in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are
recommended; however, Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. A | Page 4 of 24

5 Page





ADM7151 arduino
ADM7151
0
600mV
1.0V
–10 700mV 1.1V
800mV
1.2V
–20 900mV 1.3V
–30 1.4V
–40
–50
–60
–70
–80
–90
–100
–110
–120
1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 23. Power Supply Rejection Ratio (PSRR) vs. Frequency for Various
Headroom Voltages, ADM7151-02, VOUT = 4 V, 400 mA Load
0
600mV
–10 700mV
800mV
–20 900mV
–30
–40
1.0V
1.1V
1.2V
1.4V
1.6V
1.8V
–50
–60
–70
–80
–90
–100
–110
–120
1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 24. Power Supply Rejection Ratio (PSRR) vs. Frequency for Various
Headroom Voltages, ADM7151-04, VOUT = 5 V, 400 mA Load
0
10Hz
100Hz
1kHz
–20 10kHz
100kHz
1MHz
10MHz
–40
–60
–80
–100
–120
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
HEADROOM (V)
Figure 25. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage,
ADM7151-02, VOUT = 4 V, 100 mA Load
Data Sheet
0
10Hz
100kHz
100Hz
1MHz
–20
1kHz
10kHz
10MHz
–40
–60
–80
–100
–120
0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4
HEADROOM (V)
Figure 26. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage,
ADM7151-02, VOUT = 4 V, 400 mA Load
0
–20
–40
–60
–80 10Hz
100Hz
1kHz
–100
10kHz
100kHz
1MHz
–120
10MHz
0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6
HEADROOM (V)
Figure 27. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage,
ADM7151-02, VOUT = 4 V, 800 mA Load
0
–20
–40
–60
–80
–100
10Hz
100Hz
1kHz
–120
10kHz
100kHz
1MHz
–140
10MHz
0.3 0.5 0.7 0.9 1.1 1.3 1.5
HEADROOM (V)
Figure 28. Power Supply Rejection Ratio (PSRR) vs. Headroom Voltage,
ADM7151-04, VOUT = 5 V, 100 mA Load
Rev. A | Page 10 of 24

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