Datenblatt-pdf.com


IDT70T3719 Schematic ( PDF Datasheet ) - IDT

Teilenummer IDT70T3719
Beschreibung HIGH-SPEED 2.5V 256/128K x 72 SYNCHRONOUS DUAL-PORT STATIC RAM
Hersteller IDT
Logo IDT Logo 




Gesamt 25 Seiten
IDT70T3719 Datasheet, Funktion
HIGH-SPEED 2.5V
256/128K x 72
SYNCHRONOUS
IDT70T3719/99M
Š DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Features:
True Dual-Port memory cells which allow simultaneous
access of the same memory location
High-speed data access
– Commercial: 3.6ns (166MHz)/
4.2ns (133MHz)(max.)
– Industrial: 4.2ns (133MHz) (max.)
Selectable Pipelined or Flow-Through output mode
Counter enable and repeat features
Dual chip enables allow for depth expansion without
additional logic
Interrupt and Collision Detection Flags
Full synchronous operation on both ports
– 6ns cycle time, 166MHz operation (23.9Gbps bandwidth)
– Fast 3.6ns clock to data out
– Self-timed write allows fast cycle time
– 1.7ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 166MHz
– Data input, address, byte enable and control registers
Separate byte controls for multiplexed bus and bus
matching compatibility
Dual Cycle Deselect (DCD) for Pipelined Output Mode
2.5V (±100mV) power supply for core
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on
each port
Industrial temperature range (-40°C to +85°C) is
available at 133MHz
Available in a 324-pin Green Ball Grid Array (BGA)
Includes JTAG Functionality
Green parts available, see ordering information
Functional Block Diagram
BE7L
BE7R
BE0L
BE0R
FT/PIP EL
0a 1a
1/0
a
0h 1h
h
1h 0h
h
1a 0a
1/0
a
FT/PIPER
R/WL
R/WR
CE0L
CE1L
OEL
FT/PIPEL
1
0
1/0
1h 0h
0/1
a
1a 0a
h
Byte 0
I/O0L - I/O71L
CLKL
A17L(1)
A 0L
REPEATL
ADSL
CN TENL
Byte 7
Counter/
Address
Reg.
B
BB
B
W
WW
W
0
77
0
L
LR
R
D OUT0-8_ L
D OUT9-17 _L
DO UT18-26_L
D OUT 27-3 5_ L
D OUT 36-4 4_L
D OUT 45-5 3_L
D OUT 54-6 2_L
D OUT 63-7 2_L
D OUT0-8_ R
D OUT9-17 _R
D OU T1 8-2 6_ R
DOUT27 -35_ R
DOUT36 -4 4_ R
DOUT45 -5 3_ R
DOUT54 -6 2_ R
DOUT63 -7 2_ R
256/128K x 72
MEM ORY
ARRAY
DIN_L
DIN_R
ADDR_L
ADDR_R
0a 1a
h
0h 1h
a
0/1
Byte 7
Counter/
Address
Reg.
Byte 0
I/O0R - I/O71R
A17R(1)
CLKR
A 0R
REPE ATR
AD SR
CNTENR
COL L
INTL
CE0L
CE1L
R/WL
INTERRUPT
COLLISION
DETECTION
LOGIC
CE0R
CE1R
R/WR
COL R
INTR
NOTES:
ZZ
(2)
L
ZZ
CONTROL
LOGIC
ZZ
(2)
R
1. Address A17 is a NC for the IDT70T3799.
2. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when asserted. All static inputs, i.e., PL/FTx and OPTx
and the sleep mode pins themselves (ZZx) are not affected during sleep mode.
1
©2014 Integrated Device Technology, Inc.
TDI
T DO
C E0 R
1 CE1R
0
1/0
OER
FT/PIPER
,
,
JTAG
TC K
TMS
TRST
5687 drw 01
JULY 2014
DSC 5687/3






IDT70T3719 Datasheet, Funktion
IDT70T3719/99M
High-Speed 2.5V 256/128K x 72 Dual-Port Synchronous Static RAM
Industrial and Commercial Temperature Ranges
Recommended Operating
Temperature and Supply Voltage (1)
Grade
Ambient
Temperature
GND
VDD
Commercial
0OC to +70OC
0V 2.5V + 100mV
Industrial
-40OC to +85OC 0V 2.5V + 100mV
NOTES:
5687 tbl 05
1. This is the parameter TA. This is the "instant on" case temperature.
Recommended DC Operating
Conditions with VDDQ at 2.5V
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD Core Supply Voltage
2.4 2.5
2.6
V
VDDQ I/O Supply Voltage(3)
2.4 2.5
2.6
V
VSS Ground
00 0 V
Input High Volltage
VIH (Address, Control &
Data I/O Inputs)(3)
1.7
____ VDDQ + 100mV(2)
V
VIH
Input High Voltage _
JTAG
1.7
____ VDD + 100mV(2)
V
VIH
Input High Voltage -
ZZ, OPT, PIPE/FT
VDD - 0.2V ____
VDD + 100mV(2)
V
VIL Input Low Voltage
-0.3(1)
____
0.7
V
VIL
Input Low Voltage -
ZZ, OPT, PIPE/FT
-0.3(1)
____
0.2
V
NOTES:
5687 tbl 06a
1. VIL (min.) = -1.0V for pulse width less than tCYC/2 or 5ns, whichever is less.
2. VIH (max.) = VDDQ + 1.0V for pulse width less than tCYC/2 or 5ns, whichever is less.
3. To select operation at 2.5V levels on the I/Os and controls of a given port, the OPT
pin for that port must be set to Vss(0V), and VDDQX for that port must be supplied as indicated
above.
Recommended DC Operating
Conditions with VDDQ at 3.3V
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD Core Supply Voltage
2.4 2.5
2.6
V
VDDQ I/O Supply Voltage(3)
3.15
3.3
3.45
V
VSS Ground
00 0 V
Input High Voltage
VIH (Address, Control
&Data I/O Inputs)(3)
2.0 ____ VDDQ + 150mV(2) V
VIH
Input High Voltage _
JTAG
1.7
____ VDD + 100mV(2)
V
VIH
Input High Voltage -
ZZ, OPT, PIPE/FT
VDD - 0.2V ____ VDD + 100mV(2)
V
VIL Input Low Voltage
-0.3(1)
____
0.8
V
VIL
Input Low Voltage -
ZZ, OPT, PIPE/FT
-0.3(1)
____
0.2
V
5687 tbl 06b
NOTES:
1. VIL (min.) = -1.0V for pulse width less than tCYC/2, or 5ns, whichever is less.
2. VIH (max.) = VDDQ + 1.0V for pulse width less than tCYC/2 or 5ns, whichever is less.
3. To select operation at 3.3V levels on the I/Os and controls of a given port, the OPT pin
for that port must be set to VDD (2.5V), and VDDQX for that port must be supplied as indicated
above.
6.462

6 Page









IDT70T3719 pdf, datenblatt
IDT70T3719/99M
High-Speed 2.5V 256/128K x 72 Dual-Port Synchronous Static RAM
Industrial and Commercial Temperature Ranges
Timing Waveform of a Multi-Device Pipelined Read (1,2)
tCYC2
tCH2
tCL2
CLK
tSA tHA
ADDRESS(B1)
A0
A1
A2
A3
A4
A5 A6
CE0(B1)
tSC tHC
tSC tHC
DATAOUT(B1)
ADDRESS(B2)
tSA tHA
A0
tCD2
A1
tCD2
Q0
tDC
A2
tCKHZ
Q1
tDC
A3
tCD2
tCKLZ
A4
Q3
tCKHZ
A5
A6
CE0(B2)
DATAOUT(B2)
tSC tHC
tSC tHC
tCD2
tCKLZ
tCKHZ
Q2
tCD2
tCKLZ
,
Q4
5687 drw 07
Timing Waveform of a Multi-Device Flow-Through Read (1,2)
tCYC1
tCH1
tCL1
CLK
tSA tH
A
ADDRESS(B1)
A0
A1
A2
A3
A4
A5
CE0(B1)
DATAOUT(B1)
ADDRESS(B2)
tSC tHC
tCD1
tSA tHA
A0
tSC tHC
tCD1
D0
tDC
tCKHZ(1)
D1
tDC
A1 A2
tCD1
tCKLZ(1)
A3
D3
tCKHZ(1)
A4
tCD1
tCKLZ(1)
A5
A6
D5
A6
CE0(B2)
tSC tHC
tSC tHC
DATAOUT(B2)
tCD1
tCKLZ(1)
tCKHZ(1)
D2
tCD1
tCKLZ(1)
NOTES:
1. B1 Represents Device #1; B2 Represents Device #2. Each Device consists of one IDT70T3719/99M for this waveform,
and are setup for depth expansion in this example. ADDRESS(B1) = ADDRESS(B2) in this situation.
2. BEn, OE, and ADS = VIL; CE1(B1), CE1(B2), R/W, CNTEN, and REPEAT = VIH.
tCKHZ (1)
D4
5687 drw 08
,
6.142

12 Page





SeitenGesamt 25 Seiten
PDF Download[ IDT70T3719 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
IDT70T3719HIGH-SPEED 2.5V 256/128K x 72 SYNCHRONOUS DUAL-PORT STATIC RAMIDT
IDT
IDT70T3719MHIGH-SPEED 2.5V 256/128K x 72 SYNCHRONOUS DUAL-PORT STATIC RAMIDT
IDT

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche