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PDF MC74HC238A Data sheet ( Hoja de datos )
| Número de pieza | MC74HC238A | |
| Descripción | 1-of-8 Decoder/Demultiplexer | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC74HC238A
1-of-8 Decoder/
Demultiplexer
High−Performance Silicon−Gate CMOS
The MC74HC238A is identical in pinout to the LS238. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
The HC238A decodes a three−bit Address to one−of−eight
active−high outputs. This device features three Chip Select inputs, two
active−low and one active−high to facilitate the demultiplexing,
cascading, and chip−selecting functions. The demultiplexing function
is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the
other Chip Selects are held in their active states.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 V to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC
Standard No. 7A
• Chip Complexity: 100 FETs or 29 Equivalent Gates
• These are Pb−Free Devices*
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
16
1
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP−16
N SUFFIX
CASE 648
MC74HC238AN
AWLYYWWG
1
16
1
16
SOIC−16
D SUFFIX
CASE 751B
HC238AG
AWLYWW
1
16
16
1
TSSOP−16
DT SUFFIX
CASE 948F
HC
238A
ALYWG
G
1
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2013
June, 2013 − Rev. 4
1
Publication Order Number:
MC74HC238A/D
1 page  
INPUT A
tPLH
OUTPUT Y
MC74HC238A
SWITCHING WAVEFORMS
VALID
50%
50%
VALID
tPHL
Figure 3.
tr
VCC INPUT CS1
90%
50%
GND 10%
tPHL
90%
50%
OUTPUT Y
10%
tTHL
Figure 4.
tf
VCC
GND
tPLH
tTLH
INPUT
90%
50%
CS2, CS3 10%
OUTPUT Y
tf
tPHL
90%
50%
10%
tTHL
Figure 5.
tr
tPLH
VCC
GND
tTLH
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 6. Test Circuit
PIN DESCRIPTIONS
ADDRESS INPUTS
A0, A1, A2 (Pins 1, 2, 3)
Address inputs. These inputs, when the chip is selected,
determine which of the eight outputs is active−low.
CONTROL INPUTS
CS1, CS2, CS3 (Pins 6, 4, 5)
Chip select inputs. For CS1 at a high level and CS2, CS3
at a low level, the chip is selected and the outputs follow the
Address inputs. For any other combination of CS1, CS2, and
CS3, the outputs are at a logic low.
OUTPUTS
Y0 − Y7 (Pins 15, 14, 13, 12, 11, 10, 9, 7)
Active−high Decoded outputs. These outputs assume a
high level when addressed and the chip is selected. These
outputs remain low when not addressed or the chip is not
selected.
http://onsemi.com
5
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet MC74HC238A.PDF ] | |
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