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PDF MIC2790 Data sheet ( Hoja de datos )
| Número de pieza | MIC2790 | |
| Descripción | Supervisor | |
| Fabricantes | Micrel Semiconductor | |
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MIC2790/1/3
Supervisor with High-Accuracy,
Ultra-Fast Propagation Delay, and
Capacitor-Programmable Reset Delay
General Description
The MIC2790/1/3 is ideal for monitoring highly-accurate
core voltages that require rapid response in the event of a
fault condition. The voltage supervisor IC features a
manual reset input, enable input (MIC2793 only), a
capacitor-programmable reset timeout delay and both an
active-low and active-high reset output.
The MIC2790/1/3 monitors system voltages that are in the
range of 0.4V to 5.5V, with a typical sense accuracy of
0.5% at +25°C and ±1.0% across 40°C to +125°C. The
IC asserts a reset output when the sense voltage drops
below the threshold or when the manual reset is pulled to
a logic low. The active-low reset stays low for the duration
of the reset timeout delay once the sense voltage returns
to normal and the manual reset transitions to a logic high
state. The reset timeout delay period is programmable
from 1ms to 10s with an external capacitor.
The MIC2790/1/3 operates from a low supply voltage of
1.5V to 5.5V, and is rated to operate over the temperature
range of 40˚C to +125˚C. The MIC2790 is available in a
6-pin TSOT-23 package or a 6-pin 2mm × 2mm × 0.55mm
DFN package. The MIC2791 is available in a tiny 6-pin
1.6mm × 1.6mm × 0.55mm DFN package. The MIC2793 is
available in a 8-pin 2mm × 2mm × 0.55mm DFN package.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
1.5V to 5.5V operating supply voltage range
Ultra-fast propagation delay (1µs typically)
0.4V reference voltage (SNS pin)
±1.0% threshold accuracy from 40°C to +125°C
Monitored voltage range from 0.4V to 5.5V
Programmable reset timeout delay (from 1ms to 10s)
Manual reset input with an internal pull-up resistor
Active-high enable input pin (MIC2793 only)
The MIC2790/1/3 features multiple output options:
Open-drain active-low (/RESET)
Push-pull active-low (/RESET)
Push-pull active-high (RESET)
40°C to 125°C junction temperature range
6-pin TSOT-23 (MIC2790)
6-pin 2mm × 2mm Thin DFN (MIC2790)
6-pin 1.6mm × 1.6mm Thin DFN (MIC2791)
8-pin 2mm × 2mm Thin DFN (MIC2793)
Applications
Telecom
Computer/servers
Medical equipment
Portable
Set-top boxes
Critical microprocessor monitoring
Typical Application
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
May 22, 2014
Revision 1.2
1 page  
Micrel, Inc.
Electrical Characteristics(7) (Continued)
VDD = 3.3V; R/RESET = 100kΩ; CTH = 1nF; TA = 25°C, bold values indicate 40°C ≤ TA ≤ +125°C, unless noted.
Symbol Parameter
Condition
Min.
Typ.
/MR Input Specifications
R/MR
/MR Internal Pull-Up
Resistance
90
tp,/MR
/MR to RESET and /RESET
Propagation Delay
100
VIL /MR Logic Low Input Voltage
VIH
/MR Logic High Input
Voltage
1.2
EN Input Specifications (MIC2793 only)
REN
EN Internal Pull-Up
Resistance
90
tp,EN
EN to RESET and /RESET
Propagation Delay
/MR = logic low
100
VENL
VENH
EN Logic Low Input Voltage
EN Logic High Input Voltage
1.2
MIC2790/1/3
Max. Units
kΩ
ns
0.5 V
V
kΩ
ns
0.5 V
V
May 22, 2014
5
Revision 1.2
5 Page 
Micrel, Inc.
Functional Description
Design and Product Advantages
The MIC2790/1/3 is a highly-accurate supervisor circuit
with an ultra-fast propagation delay of 2.2µs (maximum)
over the temperature range of 40˚C to +125˚C.
Additional features in the MIC2790/1/3 include a manual
reset input pin, a capacitor-programmable reset timeout
delay and both an active-low and active-high reset
output. The capacitor-programmable reset delay help
protect against accidental system glitch during a reset
timeout.
VDD
The input supply (VDD) provides power to the
comparators and logic timers. VDD operating range is
1.5V to 5.5V. A ceramic input capacitor of 1µF with a
minimum voltage rating of 6.3V is recommended between
VDD and GND. Refer to PCB Layout Recommendations
for details.
EN
The enable (EN) pin feature is only available in the
MIC2793 option and has an internal pull-up of 90kΩ
resistor to VDD. A logic high signal on EN pin enables the
reset logic outputs, while a logic low signal disables the
reset outputs. See Figure 3 in the Timing Diagrams
section for more information.
CTH
CTH is a programmable timeout delay pin. Connect a
capacitor to ground to set a reset timeout delay ranging
from 1ms to 10s. Refer to the Reset Timeout Delay vs.
CTH plot in the Typical Characteristics section for
examples.
SNS
The sense (SNS) input pin monitors the user’s voltage
through a resistor divider network as shown in Figure 5.
VMONITOR
SNS = 0.4V
RTOP
RBOTTOM
MIC2790/1/3
To set RTOP and RBOTTOM, use Equation 1 and set an
arbitrary RTOP value greater than 100kΩ and solve for
RBOTTOM or vice versa.
VMONIT OR
0.4V 1 RTOP
RBOTTOM
Eq. 1
GND
The ground (GND) pin is the return path for VDD, logic
gates, and output pins. Refer to PCB Layout
Recommendations for details.
/MR
Manual reset (/MR) is an active-low input pin that is
internally pulled to VDD with a 90kΩ resistor. When /MR
is asserted to a logic-low level, /RESET will transition to a
logic low state while RESET will transition to a logic high
state. See the Timing Diagrams section for more
information.
/RESET
/RESET is an active-low output and is available in two
output configurations: open-drain or push-pull. The open-
drain configuration requires an external pull-up resistor,
while the push-pull does not.
/RESET is asserted low when /MR is set to a logic-low or
the SNS voltage decreases below the threshold voltage.
/RESET will remain low for the programmed reset timeout
delay after SNS > (VTH + VHYST) and /MR is set to a logic-
high, and then /RESET will transition high to indicate
normal regulation. See the Timing Diagrams section for
more information.
RESET
RESET is an active-high push-pull output and is asserted
high when /MR is set to a logic low or the SNS voltage
decreases below the threshold voltage. RESET will
remain high for the programmed reset timeout delay after
SNS > (VTH + VHYST) and /MR is set to a logic high, and
then RESET will transition low to indicate normal
regulation. See the Timing Diagrams section for more
information.
Figure 5. Resistor Divider on SNS pin
May 22, 2014
11
Revision 1.2
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet MIC2790.PDF ] | |
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