|Beschreibung||Integrated Smart Ignition Coil Driver|
Gesamt 8 Seiten
Integrated Smart Ignition Coil Driver
400V 300mJ N Channel Ignition IGBT
Control Input buffering
Input spike filter of typical 13us
Operation from Ignition or Battery line
Ground shift tolerance +/- 1.5V
Programmable maximum dwell time
Current programmable bidirectional
Collector Current limit typical 16.5A
Soft Shutdown of Collector Current after Max Dwell
Coil on Plug Ignition systems
General ignition systems
The FGBS3040E1_F085 is designed to directly drive an
ignition coil and control the current and spark event of
the coil. The coil current is controlled via the
input/diagnostic pin. When the input is driven high, the
IGBT is enabled to start charging the coil. The
FGBS3040E1_F085 will sink a current (IIN1) into the
input to denote this condition. When the collector current
increases to Icthr the input current into the
FGBS3040E1_F085 is reduced to IIN2 indicating the
collector current has reached this level. An input filter
suppresses input signals of less then 13 µsec in
duration. A Max Dwell timer is included in the
FGBS3040E1_F085 which will turn off the IGBT if the
input stays active for longer then the programmed time.
This time interval can be modified through an external
capacitor. When the Max Dwell timer is exceeded, the
FGBS3040E1_F085 will enter a Soft-Shut-Down mode
(SSD) slowly dropping the collector current thereby
discharging the coil such as to inhibit a spark event.
Once the soft shutdown operation has started, any
transitions on the input signal are ignored until after
completion of the soft shutdown function. The
FGBS3040E1_F085 will also limit the collector current
of the IGBT to Ic(lim) during charging.
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© 2016 Fairchild Semiconductor Corporation
FGBS3040E1_F085 Rev. 1.0
Input and spike filter
When the input signal voltage reaches VINH, the coil
current will be switched on through the IGBT. When the
input voltage goes below VINL, the coil current through
the IGBT will be turned off. If the ignitor is in SSD mode,
the input signal control is disabled. After a SSD
sequence input control will be re-enabled after the input
has reached a valid low. Positive and negative spikes of
< Tspike duration at the input line will be filtered out and
will not turn on/off the IGBT.
If the CSSD capacitor has a value of < 2.2nF or the
CSSD pin is shorted to ground, the maximum dwell time
and SSD functions will be disabled.
Bidirectional input / diagnosis pin
The pin IN/IFL has a double function. It is used as input
pin to control the power stage (on/off) and as output pin
that delivers diagnostic information about the collector
current level (current flag).
a) If the input voltage reaches VINH, the power stage is
turned on. If the input voltage is below VINL, the power
stage is turned off.
b) The IN/IFL pin sinks constantly a current of IIN1.
When the input voltage is above VINH and the collector
current exceeds the IcTHR threshold, the current flag is
set by switching a current sink at the bidirectional IN/IFL
pin to IIN2 (see Fig.4)
c) If resistor RA has a value <5.2k or >200k, IIN1 and
IIN2 will be set to their default values.
Figure 5: Dwell time and Soft-Shut-Down
4 5 6 7 8 9 10 11 12 13 14 15
Figure 6: TDMAX as function of external CSSD
Figure 7 shows the IN1 and IN2 currents in dependency
of the IRA current.
Figure 4: Bidirectional IN/INFL Diagnostic Pin
Maximum dwell time and soft-
When the IGBT is turned on, a delay timer, dependent
on the value of the external CSSD capacitor (see Fig.6),
is started. If a valid falling edge has not been received
after the time TDMAX, the IGBT will be turned off slowly
as shown in Fig.5. The coil current will not exceed a
slew rate of typical 1.2A/ms. If a valid falling edge is
received after the time TDMAX, the edge will be ignored
and the soft shutdown will be completed. The IGBT
cannot be subsequently turned on until a valid rising
edge is detected.
Figure 7: Typical IN1 and IN2 Currents vs Ra
The value for RA can be determined by the formula:
RA = (1.24/IRA)-750.
© 2016 Fairchild Semiconductor Corporation
FGBS3040E1_F085 • Rev. 1.0
|Seiten||Gesamt 8 Seiten|
|PDF Download||[ FGBS3040E1_F085 Schematic.PDF ]|
|FGBS3040E1_F085||Integrated Smart Ignition Coil Driver|
Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.
EPITAXIAL PLANAR NPN TRANSISTOR.
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