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PDF PL610-01 Data sheet ( Hoja de datos )
| Número de pieza | PL610-01 | |
| Descripción | Single IC XO | |
| Fabricantes | Microchip | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PL610-01 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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PL610-01/-02/-03
1.8V to 3.3V Single IC XO
with Frequency Tuning (10 MHz to 130 MHz)
Features
• Single Die, Wide Frequency Coverage,
Programmable Advanced Oscillator Design
• Single IC to Cover up to 130 MHz Output
Frequency.
• Direct Oscillation Operation with Optional
Programmable Features:
- ±50 ppm Frequency Tuning
- Output Drive Setting (4 mA, 8 mA, or 16 mA)
- 6-Bit Odd/Even Output Divider (≤ ÷63)
• Fundamental Crystal Input Frequency:
- 10 MHz to 60 MHz (Default)
- 60 MHz to 130 MHz (Programming Option)
• Output Frequency: LVCMOS
- 80 kHz to 130 MHz
• Wire Bond and Flip Chip Options to Choose from
• Very Low Jitter and Phase Noise
• Low Current Consumption
• Single 1.8V, 2.5V, or 3.3V ±10% Power Supply
• Operating Temperature Range from –40°C to
+85°C
General Description
The PL610 is a high performance general purpose
clock that uses a single die to cover outputs up to
130 MHz, eliminating the need for multiple ICs to cover
a wide frequency range. Designed to fit in a small
2.0 mm x 1.6 mm, or larger substrates, the PL610
offers the best phase noise and jitter performance,
smallest die size, and lowest power consumption of
any comparable IC.
The optional ‘frequency fine tuning’ feature of PL610
allows for frequency adjustment after encapsulation of
the module, up to ±50 ppm. In addition, there is a ‘6’ bit
optional programmable Odd/Even divider (default =
÷1), and three programmable output drive strengths
(4 mA, 8 mA (default), 16 mA) to choose from. The full
feature set of PL610 makes it the most versatile XO for
any application.
Block Diagram
PL610-01/-02/-03
FIN XTAL
XOUT
OSC
Programmable
CLOAD
FREF
(PDB)
Programmable Function
P-Counter
(6-bit)
/1,2
2016 Microchip Technology Inc.
CLK0
OE, PDB, CLK1
DS20005616A-page 1
1 page  
PL610-01/-02/-03
TABLE 1-6: KEY PROGRAMMING PARAMETERS (OPTIONAL)
CLK[0:1]
Output Frequency
CLK0 = FREF, FREF/2 or
FREF/P
Where P = 6-bit
Optional:
CLK1 = FREF, FREF/2 or
CLK0
Crystal Load
Output Drive Strength
Optional ‘Frequency
Three optional drive
Tuning’ after encapsulation, strengths to choose from:
up to:
• Low: 4 mA
±50 ppm Tuning Range
• Std: 8 mA (default)
Single-bit CL adjustment
for high/low frequency input
•
High: 16 mA
Output Dividers
Optional 6-bit odd/even
output divider:
• ÷1 (default) to ÷63
2016 Microchip Technology Inc.
DS20005616A-page 5
5 Page 
APPENDIX A: REVISION HISTORY
Revision A (August 2016)
• Converted Micrel document PL610-01/-02/-03 to
Microchip data sheet DS20005616A.
• Minor text changes throughout.
PL610-01/-02/-03
2016 Microchip Technology Inc.
DS20005616A-page 11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet PL610-01.PDF ] | |
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