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AD8122 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8122
Beschreibung Triple Differential Receiver
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 21 Seiten
AD8122 Datasheet, Funktion
Data Sheet
Triple Differential Receiver with
300 Meter Adjustable Line Equalization
AD8122
FEATURES
Compensates cables up to 300 meters for wideband video
60 MHz equalized BW at 300 meters of UTP cable
120 MHz equalized BW at 150 meters of UTP cable
Fast time domain performance
70 ns settling time to 1% at 300 meters of UTP cable
7 ns rise/fall times with 2 V step at 300 meters of UTP cable
3 frequency response gain adjustment pins
High frequency peaking adjustment (VPEAK)
Output low-pass filter cutoff adjustment (VFILTER)
Broadband flat gain adjustment (VGAIN)
Selectable for UTP or coaxial compensation
DC output offset adjustment pin (VOFFSET)
Low output offset voltage: ±4 mV at G = 1
Compensates both RGB and YPbPr
2 on-chip comparators with hysteresis can be used
for common-mode sync pulse extraction
Available in 40-lead, 6 mm × 6 mm LFCSP
APPLICATIONS
Keyboard-video-mouse (KVM)
Digital signage
RGB video over UTP cables
Professional video projection and distribution
HD video
Security video
GENERAL DESCRIPTION
The AD8122 is a high speed, triple differential receiver and
equalizer that compensates for the transmission losses of UTP
cables up to 300 meters in length and coaxial cables up to
200 meters in length. Various gain stages are summed to best
approximate the inverse frequency response of the cable. Each
channel features a high impedance differential input with high
rejection of common-mode (CM) signals that is ideal for inter-
facing directly with the cable.
The AD8122 has two control inputs for optimal cable
compensation, one LPF control input, an input to select UTP or
coaxial cable, and an input to adjust the dc output offset. The cable
compensation inputs are used to compensate for different cable
lengths: the VPEAK input controls the amount of high frequency
peaking, and the VGAIN input adjusts the broadband flat gain to
compensate for the flat cable loss. The VFILTER input controls the
cutoff frequency of output low-pass filters on each channel.
FUNCTIONAL BLOCK DIAGRAM
VPEAK VFILTER VOFFSET VGAIN
COAX/UTP
–INR
+INR
–ING
+ING
–INB
+INB
–INCMP1
+INCMP1
–INCMP2
+INCMP2
AD8122
Figure 1.
OUTR
GAINR
OUTG
GAING
OUTB
GAINB
OUTCMP1
OUTCMP2
The selection of UTP or coaxial cable compensation responses
is determined by the binary COAX/UTP input, which can be
left floating in UTP applications. The VOFFSET input allows the
dc voltage at the output to be adjusted, which can be useful in
dc-coupled systems.
For added flexibility, the gain of each channel can be set to 1
or 2 using the associated gain control pin.
The AD8122 is available in a 6 mm × 6 mm, 40-lead LFCSP
and is rated to operate over the extended temperature range
of −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.






AD8122 Datasheet, Funktion
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage
Power Dissipation
Input Voltage (Any Input)
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Rating
11 V
See Figure 2
VS− − 0.3 V to VS+ + 0.3 V
−65°C to +125°C
−40°C to +85°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, the device
soldered in a circuit board in still air. This value was measured
using a JEDEC standard 4-layer printed circuit board (PCB).
Table 3. Thermal Resistance
Package Type
40-Lead LFCSP
θJA θJC Unit
39 1.3 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8122 package
is limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the AD8122. Exceeding a junction temperature
of 175°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS+ and VS−)
times the quiescent current (IS). The power dissipation due to
each load current is calculated by multiplying the load current
by the voltage difference between the associated power supply
and the output voltage. The total power dissipation due to load
currents is then obtained by taking the sum of the individual
power dissipations. RMS output voltages must be used when
dealing with ac signals.
AD8122
Airflow reduces θJA. In addition, more metal directly in contact
with the package leads from metal traces, through holes, ground,
and power planes reduces θJA. The exposed pad on the underside
of the package must be soldered to a pad on the PCB surface that
is thermally connected to a solid plane (usually the ground plane)
to achieve the specified θJA.
Figure 2 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 40-lead LFCSP
JA = 39°C/W) on a JEDEC standard 4-layer board with the
exposed pad soldered to a pad that is thermally connected
to a PCB plane. θJA values are approximations.
6
5
4
3
2
1
0
–40 –20 0 20 40 60 80
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
for a 4-Layer Board
ESD CAUTION
Rev. 0 | Page 5 of 20

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AD8122 pdf, datenblatt
Data Sheet
150m
300m
AD8122
150m
300m
0 50 100 150 200 250 300 350 400 450
TIME (ns)
Figure 22. Equalized Pulse Response for 300 m and 150 m Cable Lengths
(2 MHz), G = 1
2 1.00
VOUT
1
0.75
0.50
VIN – VOUT
0
0.25
0
–0.25
–1 –0.50
–0.75
–2 –1.00
–100 0 100 200 300 400 500 600 700 800
TIME (ns)
Figure 23. Settling Time to 1%, 300 m Cable Length, G = 1
2.0
1.8
1.6
1.4
1.2 VPEAK AND VFILTER
1.0
0.8 VGAIN
0.6
0.4
0.2
0
0 50 100 150 200 250
CABLE LENGTH (m)
Figure 24. Recommended Settings for UTP Cable
300
0 50 100 150 200 250 300 350 400 450
TIME (ns)
Figure 25. Equalized Pulse Response for 300 m and 150 m Cable Lengths
(2 MHz), G = 2
2 2.0
VOUT
1
1.5
1.0
2VIN – VOUT
0
0.5
0
–0.5
–1 –1.0
–1.5
–2 –2.0
–100 0 100 200 300 400 500 600 700 800
TIME (ns)
Figure 26. Settling Time to 1%, 300 m Cable Length, G = 2
1.6
1.4
1.2
1.0 VGAIN
0.8
0.6
VPEAK AND VFILTER
0.4
0.2
0
0 20 40 60 80 100 120 140 160 180
CABLE LENGTH (m)
Figure 27. Recommended Settings for Coaxial Cable
200
Rev. 0 | Page 11 of 20

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