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PDF AD8555 Data sheet ( Hoja de datos )
| Número de pieza | AD8555 | |
| Descripción | Digitally Programmable Sensor Signal Amplifier | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
Zero-Drift, Digitally Programmable
Sensor Signal Amplifier
AD8555
FEATURES
Very low offset voltage: 10 µV maximum over temperature
Very low input offset voltage drift: 60 nV/°C maximum
High CMRR: 96 dB minimum
Digitally programmable gain and output offset voltage
Single-wire serial interface
Open and short wire fault detection
Low-pass filtering
Stable with any capacitive load
Externally programmable output clamp voltage for driving
low voltage ADCs
LFCSP-16 and SOIC-8 packages
2.7 V to 5.5 V operation
−40°C to +125°C operation
APPLICATIONS
Pressure and position sensors
Thermocouple amplifiers
Industrial weigh scales
Precision current sensing
Strain gages
VNEG
VPOS
FUNCTIONAL BLOCK DIAGRAM
VDD
VDD
A1
VSS
VDD
A2
VSS
R4
R1
P1
R3
P2
R2
R5
VDD
P3 R6
VDD
A3
VSS
R7
P4
VCLAMP
A5
VSS
VDD
RF
A4
FILT/
DIGOUT
VSS
DAC
VOUT
VSS
Figure 1.
GENERAL DESCRIPTION
The AD8555 is a zero-drift, sensor signal amplifier with
digitally programmable gain and output offset. Designed to
easily and accurately convert variable pressure sensor and strain
bridge outputs to a well-defined output voltage range, the
AD8555 also accurately amplifies many other differential or
single-ended sensor outputs. The AD8555 uses the ADI
patented low noise auto-zero and DigiTrim® technologies to
create an incredibly accurate and flexible signal processing
solution in a very compact footprint.
Gain is digitally programmable in a wide range from 70 to 1,280
through a serial data interface. Gain adjustment can be fully
simulated in-circuit and then permanently programmed with
proven and reliable poly-fuse technology. Output offset voltage
is also digitally programmable and is ratiometric to the supply
voltage.
In addition to extremely low input offset voltage and input
offset voltage drift and very high dc and ac CMRR, the AD8555
also includes a pull-up current source at the input pins and a
pull-down current source at the VCLAMP pin. This allows
open wire and shorted wire fault detection. A low-pass filter
function is implemented via a single low cost external capacitor.
Output clamping set via an external reference voltage allows the
AD8555 to drive lower voltage ADCs safely and accurately.
When used in conjunction with an ADC referenced to the same
supply, the system accuracy becomes immune to normal supply
voltage variations. Output offset voltage can be adjusted with a
resolution of better than 0.4% of the difference between VDD
and VSS. A lockout trim after gain and offset adjustment
further ensures field reliability.
The AD8555 is fully specified over the extended industrial
temperature range of −40°C to +125°C. Operating from single-
supply voltages of 2.7 V to 5.5 V, the AD8555 is offered in the
narrow 8-lead SOIC package and the 4 mm × 4 mm 16-lead
LFCSP.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2004–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD8555
Parameter
DIGITAL INTERFACE
Input Current
DIGIN Pulse Width to Load 0
DIGIN Pulse Width to Load 1
Time between Pulses at DIGIN
DIGIN Low
DIGIN High
DIGOUT Logic 0
DIGOUT Logic 1
Symbol Conditions
tw0 TA = 25°C
tw1 TA = 25°C
tws TA = 25°C
TA = 25°C
TA = 25°C
TA = 25°C
TA = 25°C
Data Sheet
Min Typ Max Unit
2
0.05
50
10
4
4
µA
10 µs
µs
µs
1V
V
1V
V
Rev. B | Page 4 of 29
5 Page 
AD8555
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5V
40
30
20
10
0
–9 –6 –3
0
3
6
9
VOS (µV)
Figure 4. Input Offset Voltage Distribution
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VCM (V)
Figure 5. Input Offset Voltage vs. Common-Mode Voltage
10
8
6
4
2
0
–2
–4
–6
–8
–10
–50
–25
0 25 50 75 100 125 150
TEMPERATURE (°C)
Figure 6. Input Offset Voltage vs. Temperature
Data Sheet
40
35
30
25
20
15
10
5
0
0
VS = 5V
12.5
25.0
37.5
50.0
TCVOS (nV/°C)
62.5
75.0
50
45
40
35
30
25
20
15
10
5
0
0
Figure 7. TCVOS @ VS = 5 V
12.5 25.0 37.5 50.0 62.5 75.0
TCVOS (nV/°C)
10.0
7.5
5.0
2.5
0
–2.5
–5.0
–7.5
–10.0
–50 –25
Figure 8. TCVOS @ VS = 2.7 V
VS = 5V
VOUT = 0.3V
VOUT = 4.7V
0 25 50 75 100 125 150
TEMPERATURE (°C)
Figure 9. Output Buffer Offset vs. Temperature
Rev. B | Page 10 of 29
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD8555.PDF ] | |
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