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LC72131K Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer LC72131K
Beschreibung PLL Frequency Synthesizer
Hersteller ON Semiconductor
Logo ON Semiconductor Logo 




Gesamt 22 Seiten
LC72131K Datasheet, Funktion
Ordering number : ENA0788A
LC72131K
LC72131KMA
CMOS IC
PLL Frequency Synthesizer
Overview
The LC72131K and LC72131KMA are PLL frequency synthesizers for use in tuners in radio/cassette players.
They allow high-performance AM/FM tuners to be implemented easily.
Features
High speed programmable dividers
FMIN: 10 to 160MHz …………………….. pulse swallower (built-in divide-by-two prescaler)
AMIN: 2 to 40MHz ………………………. pulse swallower
0.5 to 10MHz …………………….. direct division
IF counter
IFIN: 0.4 to 12MHz ………………………. AM/FM IF counter
Reference frequencies
Twelve selectable frequencies (4.5 or 7.2MHz crystal)
100, 50, 25, 15, 12.5, 6.25, 3.125, 10, 9, 5, 3, 1kHz
Phase comparator
Dead zone control
Unlock detection circuit
Deadlock clear circuit
Built-in MOS transistor for forming an active low-pass filter
I/O ports
Dedicated output ports: 4 Input or output ports: 2 Support clock time base output
Serial data I/O
Support CCB format communication with the system controller.
Continued on next page.
CCB is ON Semiconductor® ’s original format. All addresses are managed
by ON Semiconductor® for this format.
CCB is a registered trademark of Semiconductor Components Industries, LLC.
Semiconductor Components Industries, LLC, 2013
June, 2013
O3112HK 20120919-S00009/51407HKIM 20070328-S00008,S00009 No.A0788-1/22






LC72131K Datasheet, Funktion
Pin Assignments
LC72131K, LC72131KMA
22 21 20 19 18 17 16 15 14 13 12
LC72131K
1 2 3 4 5 6 7 8 9 10 11
Top view
20 19 18 17 16 15 14 13 12 11
LC72131KMA
1 2 3 4 5 6 7 8 9 10
Block Diagram
Top view
XIN
XOUT
FMIN
REFERENCE
DIVIDER
1/2 SWALLOW COUNTER
1/16,1/17 4bits
PHASE DETECTOR
CHARGE PUMP
UNLOCK
DETECTOR
AMIN
CE
DI
CL
DO
VDD
VSS
12bits PROGRAMMABLE
DIVIDER
CCB
I/F
POWER
ON
RESET
DATA SHIFT REGISTER
LATCH
UNIVERSAL
COUNTER
BO1 BO2 BO3 BO4
IO1 IO2
PD
AIN
AOUT
IFIN
No.A0788-6/22

6 Page









LC72131K pdf, datenblatt
LC72131K, LC72131KMA
Control Data Functions
No. Control block/data
Functions
(1) I/O port data
Latched from the pin states of the IO1 and IO2 I/O ports.
I2, I1
These values follow the pin states regardless of the input or output setting.
I1 IO1 pin state
I2 IO2 pin state
High: 1
Low: 0
(2) PLL unlock data
Latched from the state of the unlock detection circuit.
UL UL 0: Unlocked
UL 1: Locked or detection stopped mode
(3) IF counter binary
Latched from the value of the IF counter (20-bit binary counter).
counter
C19 MSB of the binary counter
C19 to C0
C0 LSB of the binary counter
Related data
IOC1
IOC2
UL0
UL1
CTE
GT0
GT1
Serial Data I/O Methods
The LC72131K/KMA inputs and outputs data using Our CCB (computer control bus) audio LSI serial bus format. This
LSI adopts an 8-bit address format CCB.
I/O mode
Address
B0 B1 B2 B3 A0 A1 A2 A3
Function
Control data input mode (serial data input)
[1]
IN1 (82)
0
0
0
1
0
1
0
0
24 data bits are input.
See the “DI Control Data (serial data input) Structure” item for details
on the meaning of the input data.
Control data input mode (serial data input)
[2]
IN2 (92)
1
0
0
1
0
1
0
0
24 data bits are input.
See the “DI Control Data (serial data input) Structure” item for details
on the meaning of the input data.
Data output mode (serial data output)
[3]
OUT (A2)
0
1
0
1
0
1
0
0
The number of bits output is equal to the number of clock cycles.
See the “DO Control Data (serial data output) Structure” item for details
on the meaning of the output data.
I/O mode determined
CE
(1)
CL
(2)
DI
(1)
DO
(2)
B0 B1 B2 B3 A0 A1 A2 A3
(1) CL: Normal high
(2) CL: Normal low
First Data IN1/2
First Data OUT
First Data OUT
No.A0788-12/22

12 Page





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