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AD9042 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD9042
Beschreibung Monolithic ADC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 25 Seiten
AD9042 Datasheet, Funktion
FEATURES
41 MSPS minimum sample rate
80 dB spurious-free dynamic range
595 mW power dissipation
Single 5 V supply
On-chip track-and-hold (T/H) and reference
Twos complement output format
CMOS-compatible output levels
APPLICATIONS
Cellular/PCS base stations
GPS anti jamming receivers
Communications receivers
Spectrum analyzers
Electro-optics
Medical imaging
ATE
GENERAL DESCRIPTION
The AD9042 is a high speed, high performance, low power,
monolithic 12-bit analog-to-digital converter (ADC). All
necessary functions, including track-and-hold (T/H) and
reference, are included on chip to provide a complete conversion
solution. The AD9042 operates from a single 5 V supply and
provides CMOS-compatible digital outputs at 41 MSPS.
Designed specifically to address the needs of wideband, multi-
channel receivers, the AD9042 maintains 80 dB spurious-free
dynamic range (SFDR) over a bandwidth of 20 MHz. Noise
performance is also exceptional; typical signal-to-noise ratio
(SNR) is 68 dB.
The AD9042 is built on a high speed complementary bipolar
process (XFCB) used by Analog Devices, Inc., and uses an
innovative multipass architecture. Units are packaged in a
44-lead LQFP low profile quad flat package. The AD9042
12-Bit, 41 MSPS
Monolithic ADC
AD9042
AIN
VOFFSET
VREF
ENCODE
ENCODE
FUNCTIONAL BLOCK DIAGRAM
AVCC
DVCC
A1 TH1
TH2
TH3 A2
ADC
2.4V
REFERENCE
ADC
DAC
6
AD9042
7
INTERNAL
TIMING MSB
DIGITAL ERROR CORRECTION LOGIC
LSB
GND
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Figure 1.
industrial grade is specified from −40°C to +85°C. However,
the AD9042 was designed to perform over the full military
temperature range (−55°C to +125°C); consult the factory for
military grade product options.
PRODUCT HIGHLIGHTS
1. Guaranteed sample rate is 41 MSPS.
2. Dynamic performance specified over entire Nyquist band;
spurious signals 80 dBc typical for −1 dBFS input signals.
3. Low power dissipation: 595 mW off a single 5 V supply.
4. Reference and track-and-hold included on chip.
5. Packaged in 44-lead LQFP.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1995–2009 Analog Devices, Inc. All rights reserved.






AD9042 Datasheet, Funktion
AD9042
Parameter1, 2
DIFFERENTIAL NONLINEARITY
(ENCODE = 20 MSPS)
INTEGRAL NONLINEARITY
(ENCODE = 20 MSPS)
ANALOG INPUT BANDWIDTH
TRANSIENT RESPONSE
OVERVOLTAGE RECOVERY TIME
Temp
25°C
Full
Full
25°C
25°C
25°C
Test Level
I
V
V
V
V
V
Min Typ
−1.0 ±0.3
±0.4
±0.75
100
10
25
Max Units
+1.0 LSB
LSB
LSB
MHz
ns
ns
1 All ac specifications tested by driving ENCODE and ENCODE differentially; see the Encoding the AD9042 section for details.
2 C1 (Pin 10 on AD9042ASTZ only) tied to GND through a 0.01 μF capacitor.
3 Analog input signal power at −1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed).
4 Analog input signal power at −1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics.
5 Analog input signal power at −1 dBFS; worst spur is the ratio of the signal level to worst spur, usually limited by harmonics.
6 Analog input signal power swept from −20 dBFS to –95 dBFS; dither power = −32.5 dBm; dither circuit used on input signal (see the Overcoming Static Nonlinearities
with Dither section); SFDR is the ratio of converter full scale to worst spur.
7 Tones at −7 dBFS (f1 = 15.3 MHz, f2 = 19.5 MHz); two-tone intermodulation distortion (IMD) rejection is ratio of either tone to worst-third order intermodulation
product.
8 Both input tones swept from −20 dBFS to −95 dBFS; dither power = −32.5 dBm; dither circuit used on input signal (see the Overcoming Static Nonlinearities with
Dither section); two-tone spurious-free dynamic range (SFDR) is the ratio of converter full scale to worst spur.
Rev. B | Page 5 of 24

6 Page









AD9042 pdf, datenblatt
TERMINOLOGY
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point of the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Nonlinearity (DNL)
The deviation of any code from an ideal 1 LSB step.
Encode Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that the
ENCODE pulse should be left in a Logic 1 state to achieve the
rated performance; pulse width low is the minimum time that
the ENCODE pulse should be left in low state. At a given clock
rate, these specifications define an acceptable encode duty cycle.
Harmonic Distortion
The ratio of the rms signal amplitude to the rms value of the
worst harmonic component, reported in dBc.
Integral Nonlinearity (INL)
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a best straight line
determined by a least square curve fit.
Maximum Conversion Rate
The encode rate at which parametric testing is performed.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed limit.
Output Propagation Delay
The delay between the 50% point of the rising edge of the
ENCODE command and the time when all output data bits
are within valid logic levels.
Overvoltage Recovery Time
The amount of time required for the converter to recover to
0.02% accuracy after an analog input signal 150% of full scale is
reduced to midscale.
Power Supply Rejection Ratio (PSRR)
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise-and-Distortion (SINAD) Ratio
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral
components, including harmonics but excluding dc.
AD9042
Signal-to-Noise Ratio SNR (Without Harmonics)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral
components, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range (SFDR)
The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious
component may or may not be a harmonic. May be reported in
decibels (degrades as signal levels is lowered) or in decibels
relative to full scale (always related back to converter full scale).
Transient Response
The time required for the converter to achieve 0.02% accuracy
when a one-half full-scale step function is applied to the
analog input.
Two-Tone Intermodulation Distortion Rejection
The ratio of the rms value of either input tone to the rms value
of the worst third-order intermodulation product; reported in dBc.
Two-Tone SFDR
The ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious component
may or may not be an IMD product. May be reported in dBc
(degrades as signal level is lowered) or in dBFS (always related
back to converter full scale).
Rev. B | Page 11 of 24

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