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PDF AD7322 Data sheet ( Hoja de datos )

Número de pieza AD7322
Descripción 12-Bit Plus Sign ADC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
2-Channel, Software-Selectable, True
Bipolar Input, 1 MSPS, 12-Bit Plus Sign ADC
AD7322
FEATURES
12-bit plus sign SAR ADC
True bipolar input ranges
Software-selectable input ranges
±10 V, ±5 V, ±2.5 V, 0 V to +10 V
1 MSPS throughput rate
Two analog input channels with channel sequencer
Single-ended, true differential, and pseudo differential
analog input capability
High analog input impedance
Low power: 21 mW
Full power signal bandwidth: 22 MHz
Internal 2.5 V reference
High speed serial interface
Power-down modes
14-lead TSSOP package
iCMOS process technology
GENERAL DESCRIPTION
The AD73221 is a 2-channel, 12-bit plus sign, successive approx-
imation analog-to-digital converter (ADC) designed on the
iCMOS™ (industrial CMOS) process. iCMOS is a process
combining high voltage silicon with submicron CMOS and
complementary bipolar technologies. It enables the develop-
ment of a wide range of high performance analog ICs capable of
33 V operation in a footprint that no previous generation of high
voltage parts could achieve. Unlike analog ICs using conventional
CMOS processes, iCMOS components can accept bipolar input
signals while providing increased performance, dramatically
reduced power consumption, and reduced package size.
The AD7322 can accept true bipolar analog input signals. The
AD7322 has four software-selectable input ranges, ±10 V, ±5 V,
±2.5 V, and 0 V to +10 V. Each analog input channel can be
independently programmed to one of the four input ranges.
The analog input channels on the AD7322 can be programmed
to be single-ended, true differential, or pseudo differential.
The ADC contains a 2.5 V internal reference. The AD7322 also
allows for external reference operation. If a 3 V reference is
applied to the REFIN/OUT pin, the AD7322 can accept a true
bipolar ±12 V analog input. Minimum ±12 V VDD and VSS
supplies are required for the ±12 V input range. The ADC has a
high speed serial interface that can operate at throughput rates
up to 1 MSPS.
1 Protected by U.S. Patent No. 6,731,232.
FUNCTIONAL BLOCK DIAGRAM
VDD REFIN/OUT VCC
AD7322
VIN0
VIN1
I/P
MUX
2.5V
VREF
T/H
13-BIT
SUCCESSIVE
APPROXIMATION
ADC
CHANNEL
SEQUENCER
CONTROL LOGIC
AND REGISTERS
DOUT
SCLK
CS
DIN
VDRIVE
AGND
VSS DGND
Figure 1.
PRODUCT HIGHLIGHTS
1. The AD7322 can accept true bipolar analog input signals,
±10 V, ±5 V, and ±2.5 V, and 0 V to +10 V unipolar signals.
2. The two analog inputs can be configured as two single-
ended inputs, one true differential input, or one pseudo
differential input.
3. 1 MSPS serial interface. SPI-/QSPI™-/DSP-/MICROWIRE™-
compatible interface.
4. Low power, 31 mW maximum, at 1 MSPS throughput rate.
5. Channel sequencer.
Table 1. Similar Devices
Device Throughput
Number Rate
AD7329 1000 kSPS
AD7328 1000 kSPS
AD7327 500 kSPS
AD7324 1000 kSPS
AD7323 500 kSPS
AD7321 500 kSPS
Number of bits
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
Number of
Channels
8
8
8
4
4
2
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2005–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




AD7322 pdf
AD7322
Parameter1
Differential Nonlinearity2
Min
Offset Error2, 4
Offset Error Match2, 4
Gain Error2, 4
Gain Error Match2, 4
Positive Full-Scale Error2, 5
Positive Full-Scale Error Match2, 5
Bipolar Zero Error2, 5
Bipolar Zero Error Match2, 5
Negative Full-Scale Error2, 5
Negative Full-Scale Error Match2,5
ANALOG INPUT
Input Voltage Ranges
(Programmed via Range Register)
Pseudo Differential VIN(−) Input
Range
DC Leakage Current
Input Capacitance3
REFERENCE INPUT/OUTPUT
Input Voltage Range
Input DC Leakage Current
Input Capacitance
Reference Output Voltage
Reference Output Voltage Error at
25°C
Reference Output Voltage
TMIN to TMAX
Reference Temperature Coefficient
Reference Output Impedance
2.5
Data Sheet
B Version
Typ
−0.7/+1
Max Unit
−0.9/+1.5 LSB
±0.9 LSB
LSB
−4/+9
−7/+10
±0.6
±0.5
±8
±14
±0.5
±0.5
±4
±7
±0.5
±0.5
±8.5
±7.5
±0.5
±0.5
±4
±6
±0.5
±0.5
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
Test Conditions/Comments
Differential mode; guaranteed no missing codes to
13 bits
Single-ended mode; guaranteed no missing codes
to 12 bits
Single-ended/pseudo differential mode
(LSB = FSR/8192)
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Reference = 2.5 V; see Table 6
±10 V VDD = 10 V min, VSS = −10 V min, VCC = 2.7 V to 5.25 V
±5 V VDD = 5 V min, VSS = −5 V min, VCC = 2.7 V to 5.25 V
±2.5 V VDD = 5 V min, VSS = − 5 V min, VCC = 2.7 V to 5.25 V
0 to 10
V VDD = 10 V min, VSS = AGND min, VCC = 2.7 V to 5.25 V
VDD = 16.5 V, VSS = −16.5 V, VCC = 5 V; see Figure 40
and Figure 41
±3.5 V Reference = 2.5 V; range = ±10 V
±6 V Reference = 2.5 V; range = ±5 V
±5 V Reference = 2.5 V; range = ±2.5 V
+3/−5
V Reference = 2.5 V; range = 0 V to +10 V
±80 nA VIN = VDD or VSS
3 nA Per channel, VIN = VDD or VSS
13.5 pF When in track, ±10 V range
16.5 pF When in track, ±5 V and 0 V to +10 V range
21.5 pF When in track, ±2.5 V range
3 pF When in hold, all ranges
3V
±1 µA
10 pF
2.5 V
±5 mV
±10 mV
3 25 ppm/°C
7Ω
Rev. B | Page 4 of 36

5 Page





AD7322 arduino
AD7322
–50
VCC = 5V
–55 VDD/VSS = ±12V
TA = 25°C
–60 fS = 1MSPS
±10V SE
–65
0V TO +10V SE
0V TO +10V DIFF
±5V SE
–70
–75 ±10V DIFF
±5V DIFF
–80 ±2.5V DIFF
–85
±2.5V SE
–90
–95
–100
10
100 1000
ANALOG INPUT FREQUENCY (kHz)
Figure 10. THD vs. Analog Input Frequency for Single-Ended (SE) and True
Differential Mode (Diff) at 5 V VCC
Data Sheet
80
±10V DIFF ±5V DIFF
75 ±2.5V DIFF
70 0V TO +10V SE
±2.5V SE
65
±10V SE
±5V SE
0V TO +10V DIFF
60
55
50
10
VCC = 3V
VDD/VSS = ±12V
TA = 25°C
fS = 1MSPS
100 1000
ANALOG INPUT FREQUENCY (kHz)
Figure 13. SINAD vs. Analog Input Frequency for Single-Ended (SE) and
Differential Mode (Diff) at 3 V VCC
–50
VCC = 3V
–55 VDD/VSS = ±12V
TA = 25°C
–60 fS = 1MSPS
±10V SE
–65
0V TO +10V DIFF
–70 0V TO +10V SE
±5V SE
–75
–80 ±10V DIFF
–85
–90
±2.5V SE
±5V DIFF
–95
–100
10
±2.5V DIFF
100
1000
ANALOG INPUT FREQUENCY (kHz)
Figure 11. THD vs. Analog Input Frequency for Single-Ended (SE) and True
Differential Mode (Diff) at 3 V VCC
–50
–55
–60
–65
–70
–75
–80
–85
–90
–95
0
VCC = 3V
VCC = 5V
VDD/VSS = ±12V
SINGLE-ENDED MODE
fS = 1MSPS
TA = 25°C
50kHz ON SELECTED CHANNEL
100 200 300 400 500
FREQUENCY OF INPUT NOISE (kHz)
Figure 14. Channel-to-Channel Isolation
600
80
±10V DIFF
±5V DIFF
75 ±2.5V DIFF
70
±2.5V SE
0V TO +10V SE
65
±10V SE
±5V SE
0V TO +10V DIFF
60
55
50
10
VCC = 5V
VDD/VSS = ±12V
TA = 25°C
fS = 1MSPS
100 1000
ANALOG INPUT FREQUENCY (kHz)
Figure 12. SINAD vs. Analog Input Frequency for Single-Ended (SE) and
Differential Mode (Diff) at 5 V VCC
10k
9469
VCC = 5V
9k VDD/VSS = ±12V
RANGE = ±10V
8k 10k SAMPLES
TA = 25°C
7k
6k
5k
4k
3k
2k
1k
0
228
303 0
0
–2 –1
0
1
2
CODE
Figure 15. Histogram of Codes True Differential Mode
Rev. B | Page 10 of 36

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