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PDF MC74HC164B Data sheet ( Hoja de datos )
| Número de pieza | MC74HC164B | |
| Descripción | 8-Bit Serial-Input/ParallelOutput Shift Register | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC74HC164B
8-Bit Serial-Input/Parallel-
Output Shift Register
High−Performance Silicon−Gate CMOS
The MC74HC164B is identical in pinout to the LS164. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
The MC74HC164B is an 8−bit, serial−input to parallel−output shift
register. Two serial data inputs, A1 and A2, are provided so that one
input may be used as a data enable. Data is entered on each rising edge
of the clock. The active−low asynchronous Reset overrides the Clock
and Serial Data inputs. Schmitt−trigger action at the Clock input
enhances the device’s tolerance to slower rise and fall times and
immunity to noise of the input clock signal.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 V to 6.0 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the JEDEC Standard No. 7 A Requirements
• Chip Complexity: 244 FETs or 61 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
14
1
www.onsemi.com
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
1
HC164BG
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
HC
164B
ALYWG
G
1
A
L, WL
Y
W, WW
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
March, 2016 − Rev. 2
1
Publication Order Number:
MC74HC164B/D
1 page  
MC74HC164B
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
fmax Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
tPLH,
tPHL
Maximum Propagation Delay, Clock to Q
(Figures 1 and 4)
tPHL Maximum Propagation Delay, Reset to Q
(Figures 2 and 4)
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
Cin Maximum Input Capacitance
CPD Power Dissipation Capacitance (Per Package)*
Guaranteed Limit
VCC −55_C to
V 25_C v 85_C v 125_C Unit
2.0 10 10 10 MHz
3.0 20 20 20
4.5 40 35 30
6.0 50 45 40
2.0 160 200 250 ns
3.0 100 150 200
4.5 32 40 48
6.0 27 34 42
2.0 175 220 260 ns
3.0 100 150 200
4.5 35 44 53
6.0 30 37 45
2.0 75
3.0 27
4.5 15
6.0 13
95 110 ns
32 36
19 22
16 19
— 10 10 10 pF
Typical @ 25°C, VCC = 5.0 V
180
pF
TIMING REQUIREMENTS (Input tr = tf = 6 ns)
Symbol
Parameter
tsu Minimum Setup Time, A1 or A2 to Clock
(Figure 3)
th Minimum Hold Time, Clock to A1 or A2
(Figure 3)
trec Minimum Recovery Time, Reset Inactive to Clock
(Figure 2)
tw Minimum Pulse Width, Clock
(Figure 1)
tw Minimum Pulse Width, Reset
(Figure 2)
Guaranteed Limit
VCC −55_C to
V 25_C v 85_C v 125_C Unit
2.0 25 35 40 ns
3.0 15 20 25
4.5 7 8 9
6.0 5 6 6
2.0 3 3 3 ns
3.0 3 3 3
4.5 3 3 3
6.0 3 3 3
2.0 3 3 3 ns
3.0 3 3 3
4.5 3 3 3
6.0 3 3 3
2.0 50 60 75 ns
3.0 26 35 45
4.5 12 15 20
6.0 10 12 15
2.0 50 60 75 ns
3.0 26 35 45
4.5 12 15 20
6.0 10 12 15
www.onsemi.com
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet MC74HC164B.PDF ] | |
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