Datenblatt-pdf.com


HI-3201 Schematic ( PDF Datasheet ) - HOLTIC

Teilenummer HI-3201
Beschreibung AVIONICS DATA MANAGEMENT ENGINE
Hersteller HOLTIC
Logo HOLTIC Logo 




Gesamt 30 Seiten
HI-3201 Datasheet, Funktion
October 2016
HI-3200, HI-3201
AVIONICS DATA MANAGEMENT ENGINE /
ARINC 429 - CAN BUS BRIDGE
GENERAL DESCRIPTION
The HI-3200 from Holt Integrated Circuits is a single chip
CMOS data management IC capable of managing, storing
and forwarding avionics data messages between eight
ARINC 429 receive channels, four ARINC 429 transmit
channels and a single CAN / ARINC 825 data bus.
The ARINC 429 and CAN buses may be operated inde-
pendently, allowing a host CPU to send and receive data
on multiple buses, or the HI-3200 can be programmed to
automatically re-format, re-label, re-packetize and re-
transmit data from ARINC 429 receive buses to ARINC
429 transmit buses, as well as from ARINC 429 to CAN or
CAN to ARINC 429.
A 32K x 8 on-board memory allows received data to be
logically organized and automatically updated as new
ARINC 429 labels or CAN frames are received.
An auto-initialization feature allows configuration informa-
tion to be up-loaded from an external EEPROM on reset to
facilitate rapid start-up or operation without a host CPU.
The HI-3200 interfaces directly with Holt’s HI-8448 octal
ARINC 429 receiver IC, HI-8596 or HI-8592 ARINC 429
line drivers and HI-3110 integrated CAN controller /
transceiver.
The HI-3201 is identical to the HI-3200 except it comes in
an 80-pin PQFP package with eight instead of two ARINC
429 bit monitor pins.
APPLICATION
CPU
FEATURES
· Eight ARINC 429 Receive channels
· Four ARINC 429 Transmit channels
· CAN Bus / ARINC 825 Interface
· 32KB on chip user-configurable data storage
memory
· Programmable received data filtering for ARINC 429
and CAN buses
· Programmable transmission schedulers for periodic
ARINC 429 and CAN message broadcasting
· Flexible protocol bridge ARINC 429 to CAN and
CAN to ARINC 429
· SPI Host CPU interface
· Auto-initialization feature allows power-on
configuration or independent operation without CPU
PIN CONFIGURATION
AACK 1
CGP2 2
AINT 3
CSTAT 4
SCANSHIFT 5
ARX2N 6
ARX3P 7
VDD 8
GND 9
ARX3N 10
ARX4P 11
ARX4N 12
ARX5P 13
ARX5N 14
ARX6P 15
ARX6N 16
HI-3200PQI
&
HI-3200PQT
48 CMROUT
47 ATXSLP0
46 ATX0N
45 ATX0P
44 ATX1N
43 ATX1P
42 ATXSLP1
41 VDD
40 GND
39 COSC
38 ATXSLP2
37 ATX2N
36 ATX2P
35 ATX3N
34 ATX3P
33 ATXSLP3
HI-3200
(DS3200 Rev. K)
64 - Pin Plastic Quad Flat Pack (PQFP)
(See ordering information for additional pin configurations)
HOLT INTEGRATED CIRCUITS
www.holtic.com
10/16






HI-3201 Datasheet, Funktion
HI-3200, HI-3201
Example 7. ARINC 825 (CAN) Terminal / Data Manager
ARINC 825 / CAN
TRANSMITTER
Host CPU
HCSB
HSCLK
HMOSI
HMISO
MINT
MINTACK
SPI
ARINC 825 / CAN
INTERRUPT
CONTROL
ARINC 825 / CAN
FILTER / MASK
TABLE
ARINC825 / CAN
RECEIVE DATA
MEMORY
4K x 8
ARINC825 / CAN
FILTER
HI-3110
Data
Interfacel
ARINC 825 / CAN
INTERRUPT ENABLE
TABLE
HI-3110
Configuration
& Control
CCSB
CSCLK
CMOSI
CMISO
CMROUT
COSC
CGP2
CSTAT
HI-3110
Transceiver
HI-3200
HOLT INTEGRATED CIRCUITS
6

6 Page









HI-3201 pdf, datenblatt
HI-3200, HI-3201
HI-3200 SYSTEM CONFIGURATION
Starting at memory address 0x8000, the HI-3200
contains a set of registers that are used to configure the
HI-3200 device and, if used, its associated HI-3110
integrated CAN controller / transceiver.
The user needs only to program the HI-3200
configuration registers to completely define the full
system operation.
Configuration information for the HI-3110 is automatically
transferred from the HI-3200 to the HI-3110 immediately
after the RUN input is asserted.
An SPI by-pass mode allows the user to directly access
the HI-3110, but it is highly recommended that this is
used solely for design debugging purposes and is locked
out in the final design implementation. By-pass mode is
enabled by setting the state of the MODE2:0 pins during
reset. See the Reset and Start-Up Configuration section
for more details.
The configuration registers are divided into four
categories, as follows;
1. HI-3200 global configuration
2. ARINC 429 Receive channel configuration
3. ARINC 429 Transmit channel configuration
4. CAN Bus bit timing configuration
HI-3200 Global Configuration
The following registers define the HI-3200 top-level configuration:
MASTER CONTROL REGISTER
(Address 0x800F)
XXX
76543210
MSB
LSB
Bit Name
R/W Default Description
7 A429RX
R/W 0 This bit must be set to a “1” to allow the HI-3200 to receive ARINC 429 data on any of the eight
channels. If set to a zero, the HI-3200 will not respond to any ARINC 429 receive bus,
regardless of the state of the ARINC 429 Receive channel Control Registers.
6 A429TX
R/W 0 This bit must be set to a “1” to allow the HI-3200 to transmit ARINC 429 data on any of the four
channels. If set to a zero, the HI-3200 will not output ARINC 429 data and the ARINC 429
transmit sequencers will remain in their reset state.
5 CANRX
R/W 0 This bit must be set to a “1” to allow the HI-3200 to receive CAN Frames from the HI-3110
controller. If set to a zero, the HI-3200 will not respond to any received CAN frames, regardless
of the state of the CAN Bus Control Register.
4 CANTX
R/W 0 This bit must be set to a “1” to allow the HI-3200 to transmit CAN frames. If set to a zero, the
HI-3200 will not output CAN frames and the CAN transmit sequencer will remain in its reset
state.
3 AFLIP
R/W 0 When set to a “1”, this bit switches the bit order of the ARINC 429 label byte in both receive and
transmit channels.
2-
R/W 0 Not Used
1-
R/W 0 Not Used
0-
R/W 0 Not Used
HOLT INTEGRATED CIRCUITS
12

12 Page





SeitenGesamt 30 Seiten
PDF Download[ HI-3201 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
HI-3200AVIONICS DATA MANAGEMENT ENGINEHOLTIC
HOLTIC
HI-3201AVIONICS DATA MANAGEMENT ENGINEHOLTIC
HOLTIC

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche