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74LCXH162244 Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer 74LCXH162244
Beschreibung LOW VOLTAGE CMOS 16-BIT BUS BUFFER
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 10 Seiten
74LCXH162244 Datasheet, Funktion
74LCXH162244
LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE)
WITH 5V TOLERANT INPUTS AND OUTPUTS
s 5V TOLERANT INPUTS AND OUTPUTS
s HIGH SPEED :
tPD = 4.4 ns (MAX.) at VCC = 3V
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 12mA (MIN) at VCC = 3V
s PCI BUS LEVELS GUARANTEED AT 12 mA
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s 26SERIE RESISTORS IN OUTPUTS
s BUS HOLD PROVIDED ON DATA INPUT
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES H162244
s LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
s ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX162244 is a low voltage CMOS 16 BIT
BUS BUFFER (NON-INVERTED) fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
Any nG output control governs four BUS BUFF-
ERS. Output Enable input (nG) tied together gives
full 16-bit operation.
When nG is LOW, the outputs are on. When nG is
HIGH, the output are in high impedance state.
Active bus-hold circuitry is provided to hold un-
used or floating data inputs at a valid logic level.
This device is designed to be used with 3 state
memory address drivers, etc.
The device circuits is including 26series resis-
tance in the outputs. These resistors permit to re-
duce line noise in high speed applications.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
PIN CONNECTION
T&R
74LCXH162244TTR
February 2003
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74LCXH162244 Datasheet, Funktion
74LCXH162244
TEST CIRCUIT
TEST
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
CL = 50 pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500or equivalent
RT = ZOUT of pulse generator (typically 50)
WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
SWITCH
Open
6V
GND
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