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IFCM30T65GD Schematic ( PDF Datasheet ) - Infineon

Teilenummer IFCM30T65GD
Beschreibung Control Integrated POwer System
Hersteller Infineon
Logo Infineon Logo 




Gesamt 17 Seiten
IFCM30T65GD Datasheet, Funktion
Control Integrated POwer System
(CIPOS™)
IFCM30T65GD
Datasheet
Datasheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
<Revision 1.0>
<2016-05-18>






IFCM30T65GD Datasheet, Funktion
Control Integrated POwer System (CIPOS™)
IFCM30T65GD
It is recommended for proper work of this product
not to provide input pulse-width lower than 0.5us.
VFO (Fault-output, Pin 12)
The VFO pin indicates a module failure in case of
under voltage at pin VDD or in case of triggered
over current detection at ITRIP.
VDD
VFO
VSS
Figure 5
CIPOS
RON,FLT
From ITRIP - Latch
1
From UV detection
Internal circuit at pin VFO
NTC (Thermistor, Pin 15)
The NTC pin provides direct access to thermistor,
which is referenced to VSS. An external pull-up
resistor connected to +5V ensures that the resulting
voltage can be directly connected to the
microcontroller.
ITRIP (Over current detection function, Pin 13)
CIPOSprovides an over current detection
function by connecting the ITRIP input with the
IGBT collector current feedback. The ITRIP
comparator threshold (typ. 0.47V) is referenced to
VSS ground. An input noise filter (typ.: tITRIPMIN =
530ns) prevents the driver to detect false over-
current events.
Over current detection generates a shutdown of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
VDD, VSS (Control supply and reference, Pin 11, 14)
VDD is the control supply and it provides power
both to input logic and to output power stage.
Input logic is referenced to VSS ground.
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of VDDUV+ = 12.1V is present.
The IC shuts down all the gate drivers power
outputs, when the VDD supply voltage is below
VDDUV- = 10.4V. This prevents the external power
switches from critically low gate voltage levels
during on-state and therefore from excessive power
dissipation.
NA, NB (IGBT emitter, Pin 17, 19)
The IGBT emitters are available for current
measurements of each phase. It is recommended to
keep the connection to pin VSS as short as possible
in order to avoid unnecessary inductive voltage
drops.
A, B (IGBT collector, Pin 18, 20)
These pins are IGBT collector. It is mandatory to
connect anti-parallel diode between IGBT collector
and emitter.
DA, DB (Diode anode, Pin21, 22)
The diode anode should be externally connected
with IGBT collector of each phase.
P (Positive output voltage, Pin23)
The diode cathodes are connected to the output
voltage. It is noted that the voltage does not exceed
450 V.
Datasheet
6 <Revision 1.0>
<2016-05-18>

6 Page









IFCM30T65GD pdf, datenblatt
Control Integrated POwer System (CIPOS™)
IFCM30T65GD
Circuit of a Typical Application
(1) NC
(2) NC
(3) NC
(4) NC
(5) NC
(6) NC
Micro
Controller 5 or 3.3V line VDD line
<Signal for protection>
Temperature monitor
#3 #2
#1 (7) NC
(8) LIN(A)
LIN1
(9) LIN(B)
LIN2
(10) NC
(11) VDD
(12) VF O
(13) ITRIP
(14) VSS
(15) NTC
VDD
VF O
ITRIP
VSS
(16) NC
<Signal for protection>
A-phase current sensing
B-phase current sensing
Input surge voltage sensing
LO1
LO2
(24) NC
(23) P
(22) DA
(21) DB
(20) A
(19) NA
#7
#4
(18) B
(17) NB
#5
#7
#6
AC
~
#8
Figure 9 Typical application circuit
Because CIPOSMini PFC has very high speed switching characteristics, considerable large surge voltage between P and N
terminals and switching noise on signaling path are generated easily. Please pay attention to the below items for optimized
application circuit design.
1. Input circuit
- To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100Ω, 1nF)
- CIN should be placed as close to VSS pin as possible.
2. Itrip circuit
- To prevent protection function errors, CITRIP should be placed as close to Itrip and VSS pins as possible.
3. VFO circuit
- VFO output is an open drain output. This signal line should be pulled up to the positive side of the 5V/3.3V logic power
supply with a proper resistor RPU. It is recommended that RC filter be placed as close to the controller as possible.
4. Snubber capacitor
- The wiring between CIPOSMini PFC and snubber capacitor including shunt resistor should be as short as possible.
5. Shunt resistor
- The shunt resistor of SMD type should be used for reducing its stray inductance.
6. Ground pattern
- Ground pattern should be separated at only one point of shunt resistor as short as possible.
7. It is mandatory to connect anti-parallel diode (2A, voltage rating higher than 650V) to PFC IGBT.
8. Input surge voltage protection circuit
- This protection circuit is necessary for PFC IGBT to be protected from excessive surge voltage.
Datasheet
12 <Revision 1.0>
<2016-05-18>

12 Page





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