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9DBV0941 Schematic ( PDF Datasheet ) - IDT

Teilenummer 9DBV0941
Beschreibung 9-output 1.8V HCSL Fanout Buffer
Hersteller IDT
Logo IDT Logo 




Gesamt 18 Seiten
9DBV0941 Datasheet, Funktion
9-output 1.8V HCSL Fanout Buffer
w/Zo=100ohms
9DBV0941
DATASHEET
Description
The 9DBV0941 is a member of IDT's Full-Featured PCIe
family. The device has 9 output enables for clock
management, and 3 selectable SMBus addresses. It has
integrated terminations for direct connection to 100ohm
transmission lines.
Recommended Application
PCIe Gen1-3 clock distribution in Storage, Networking,
Compute, Consumer
Output Features
9 - 1-200MHz Low-Power (LP) HCSL DIF pairs w/ZO=100
Easy AC-coupling to other logic families, see IDT
application note AN-891
Key Specifications
Additive cycle-to-cycle jitter <5ps
Output-to-output skew < 60ps
Additive phase jitter is <100fs rms for PCIe Gen3
Additive phase jitter <300fs rms (12kHz-20MHz @125MHz)
Block Diagram
Features/Benefits
100ohm direct connect; saves 36 resistors and 62mm2
compared to standard HCSL
53mW typical power consumption; eliminates thermal
concerns
Outputs can optionally be supplied from any voltage
between 1.05V and 1.8V; maximum power savings
OE# pins; support DIF power management
HCSL-compatible differential input; can be driven by
common clock sources
SMBus-selectable features allow optimization to customer
requirements
Slew rate for each output; allows tuning for various line
lengths
Differential output amplitude; allows tuning for various
application environments
1MHz to 200MHz operating frequency
3.3V tolerant SMBus interface works with legacy controllers
Selectable SMBus addresses; multiple devices can easily
share an SMBus segment
Device contains default configuration; SMBus interface not
required for device operation
Space saving 48-pin 6x6mm VFQFPN; minimal board
space
vOE(8:0)#
9
CLK_IN
CLK_IN#
vSADR
^CKPWRGD_PD#
SDATA_3.3
SCLK_3.3
CONTROL
LOGIC
DIF8
DIF7
DIF6
DIF5
DIF4
DIF3
DIF2
DIF1
DIF0
9DBV0941 REVISION C 03/28/16 1 ©2016 Integrated Device Technology, Inc.






9DBV0941 Datasheet, Funktion
9DBV0941 DATASHEET
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 9DBV0941. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage
VDDx
Applies to VDD, VDDA and VDDIO
Input Voltage
VIN
Input High Voltage, SMBus VIHSMB
SMBus clock and data pins
Storage Temperature
Ts
Junction Temperature
Tj
Input ESD protection ESD prot
Human Body Model
1Guaranteed by design and characterization, not 100% tested in production.
2 Operation under these conditions is neither implied nor guaranteed.
3 Not to exceed 2.5V.
MIN
-0.5
-0.5
-65
2000
TYP
MAX
2.5
VDD+0.5
3.6
150
125
UNITS NOTES
V 1,2
V 1,3
V1
°C 1
°C 1
V1
Electrical Characteristics–Clock Input Parameters
TA = TCOM or TIND; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP
Input Crossover Voltage -
DIF_IN
Input Swing - DIF_IN
Input Slew Rate - DIF_IN
VCROSS
VSWING
dv/dt
Cross Over Voltage
Differential value
Measured differentially
150
300
0.4
Input Leakage Current
Input Duty Cycle
IIN
dtin
VIN = VDD , VIN = GND
Measurement from differential wavefrom
-5
40
Input Jitter - Cycle to Cycle JDIFIn
Differential Measurement
1 Guaranteed by design and characterization, not 100% tested in production.
2Slew rate measured through +/-75mV window centered around differential zero
0
MAX
900
8
5
60
125
UNITS NOTES
mV 1
mV
V/ns
uA
%
ps
1
1,2
1
1
9-OUTPUT 1.8V HCSL FANOUT BUFFER W/ZO=100OHMS
6
REVISION C 03/28/16

6 Page









9DBV0941 pdf, datenblatt
9DBV0941 DATASHEET
SMBus Table: Output Enable Register 1
Byte 0
Name
Control Function
Type
Bit 7
DIF OE7
Output Enable
RW
Bit 6
DIF OE6
Output Enable
RW
Bit 5
DIF OE5
Output Enable
RW
Bit 4
DIF OE4
Output Enable
RW
Bit 3
DIF OE3
Output Enable
RW
Bit 2
DIF OE2
Output Enable
RW
Bit 1
DIF OE1
Output Enable
RW
Bit 0
DIF OE0
Output Enable
RW
1. A low on these bits will overide the OE# pin and force the differential output Low/Low
0
Low/Low
Low/Low
Low/Low
Low/Low
Low/Low
Low/Low
Low/Low
Low/Low
SMBus Table: Output Enable and Output Amplitude Control Register
Byte 1
Name
Control Function
Type
0
Bit 7
Reserved
Bit 6
Reserved
Bit 5
DIF OE8
Output Enable
RW
Low/Low
Bit 4
Reserved
Bit 3
Reserved
Bit 2
Reserved
Bit 1
Bit 0
AMPLITUDE 1
AMPLITUDE 0
Controls Output Amplitude
RW
RW
00 = 0.6V
10= 0.8V
1. A low on the DIF OE bit will overide the OE# pin and force the differential output Low/Low
SMBus Table: DIF Slew Rate Control Register
Byte 2
Name
Control Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SLEWRATESEL DIF7
SLEWRATESEL DIF6
SLEWRATESEL DIF5
SLEWRATESEL DIF4
SLEWRATESEL DIF3
SLEWRATESEL DIF2
SLEWRATESEL DIF1
SLEWRATESEL DIF0
Adjust Slew Rate of DIF7
Adjust Slew Rate of DIF6
Adjust Slew Rate of DIF5
Adjust Slew Rate of DIF4
Adjust Slew Rate of DIF3
Adjust Slew Rate of DIF2
Adjust Slew Rate of DIF1
Adjust Slew Rate of DIF0
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Slow setting
Slow setting
Slow setting
Slow setting
Slow setting
Slow setting
Slow setting
Slow setting
SMBus Table: DIF Slew Rate Control Register
Byte 3
Bit 7
Bit 6
Bit 5
Bit 4
Name
Control Function
Type
Reserved
Reserved
Reserved
Reserved
Bit 3
Reserved
Bit 2
Bit 1
Bit 0
SLEWRATESEL DIF8
Reserved
Reserved
Adjust Slew Rate of DIF8
RW
0
Slow setting
Byte 4 is Reserved and reads back 'hFF
1
OE# pin control
OE# pin control
OE# pin control
OE# pin control
OE# pin control
OE# pin control
OE# pin control
OE# pin control
Default
1
1
1
1
1
1
1
1
1
OE# pin control
01 = 0.7V
11 = 0.9V
Default
0
1
1
0
1
1
1
0
1
Fast setting
Fast setting
Fast setting
Fast setting
Fast setting
Fast setting
Fast setting
Fast setting
Default
1
1
1
1
1
1
1
1
1
Fast setting
Default
1
1
0
0
0
1
1
1
9-OUTPUT 1.8V HCSL FANOUT BUFFER W/ZO=100OHMS
12
REVISION C 03/28/16

12 Page





SeitenGesamt 18 Seiten
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