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NB3N206S Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer NB3N206S
Beschreibung 3.3 V Differential Multipoint Low Voltage M-LVDS Driver Receiver
Hersteller ON Semiconductor
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Gesamt 19 Seiten
NB3N206S Datasheet, Funktion
NB3N201S, NB3N206S
3.3 V Differential Multipoint
Low Voltage M-LVDS Driver
Receiver
Description
The NB3N20xS Series are pure 3.3 V supply differential Multipoint
Low Voltage (M−LVDS) line Drivers and Receivers. Devices
NB3N201S and NB3N206S are TIA/EIA−899 compliant. NB3N201S
offers the Type 1 receiver threshold at 0.0 V. NB3N206S offers the
Type 2 receiver threshold at 0.1 V.
These devices have Type−1 and Type−2 receivers that detect the bus
state with as little as 50 mV of differential input voltage over a
common−mode voltage range of −1 V to 3.4 V. The Type−1 receivers
have near zero thresholds (±50 mV) and exhibit 25 mV of differential
input voltage hysteresis to prevent output oscillations with slowly
changing signals or loss of input. Type−2 receivers include an offset
threshold to provide a detectable voltage under open−circuit, idle−bus,
and other faults conditions.
NB3N201S and NB3N206S support Simplex or Half Duplex bus
configurations.
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8
1
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS
8
NB20x
AYWW
G
1
NB20x
x
A
Y
WW
G or G
= Specific Device Code
= 1, 6
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
Features
Low−Voltage Differential 30 W to 55 W Line Drivers
and Receivers for Signaling Rates Up to 200 Mbps
Type−1 Receivers Incorporate 25 mV of Hysteresis
Type−2 Receivers Provide an Offset (100 mV)
Threshold to Detect Open−Circuit and Idle−Bus
Conditions
Meets or Exceeds the M−LVDS Standard TIA/EIA−899
for Multipoint Data Interchange
Controlled Driver Output Voltage Transition Times for
Improved Signal Quality
−1 V to 3.4 V Common−Mode Voltage Range Allows
Data Transfer With up to 2 V of Ground Noise
Bus Pins High Impedance When Disabled or VCC
1.5 V
M−LVDS Bus Power Up/Down Glitch Free
Operating range: VCC = 3.3 ±10% V( 3.0 to 3.6 V)
Operation from –40°C to 85°C.
These are Pb−Free Devices
Applications
Low−Power High−Speed Short−Reach Alternative to
TIA/EIA−485
Backplane or Cabled Multipoint Data and Clock
Transmission
Cellular Base Stations
Central−Office Switches
Network Switches and Routers
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 1
1
Publication Order Number:
NB3N201S/D






NB3N206S Datasheet, Funktion
NB3N201S, NB3N206S
Table 5. DC CHARACTERISTICS VCC = 3.3 ±10% V( 3.0 to 3.6 V), GND = 0 V, TA = −40°C to +85°C (See Notes 4, 5)
Symbol
Characteristic
Typ
(Note
Min 5) Max Unit
BUS INPUT AND OUTPUT
IA Input Current Receiver or Transceiver with Driver Disabled
VA = 3.8 V, VB = 1.2 V
VA = 0.0 V or 2.4 V, VB = 1.2 V
VA = −1.4 V, VB = 1.2 V
0
−20
−32
uA
32
20
0
IB Input Current Receiver or Transceiver with Driver Disabled
VB = 3.8 V, VA = 1.2 V
VB = 0.0 V or 2.4 V, VA = 1.2 V
VB = −1.4 V, VA = 1.2 V
0
−20
−32
uA
32
20
0
IAB Differential Input Current Receiver or Transceiver with driver disabled (IA−IB)
VA = VB , −1.4 VA 3.8 V
−4
uA
4
IA(OFF)
Input Current Receiver or Transceiver Power Off 0V VCC 1.5 and:
VA = 3.8 V, VB = 1.2 V
VA = 0.0 V or 2.4 V, VB = 1.2 V
VA = −1.4 V, VB = 1.2 V
0
−20
−32
uA
32
20
0
IB(OFF)
Input Current Receiver or Transceiver Power Off 0V VCC 1.5 and:
VB = 3.8 V, VA = 1.2 V
VB = 0.0 V or 2.4 V, VA = 1.2 V
VB = −1.4 V, VA = 1.2 V
0
−20
−32
uA
32
20
0
IAB(OFF) Receiver Input or Transceiver Input/Output Power Off Differential Input Current; (IA−IB)
uA
VA = VB , 0 VCC 1.5 V, −1.4 VA 3.8 V
−4
4
CA Transceiver Input Capacitance with Driver Disabled VA = 0.4 sin(30E6πt) + 0.5 V using
HP4194A impedance analyzer (or equivalent); VB = 1.2 V
5 pF
CB Transceiver Input Capacitance with Driver Disabled VB = 0.4 sin(30E6πt) + 0.5 V using
HP4194A impedance analyzer (or equivalent); VA = 1.2 V
5 pF
CAB Transceiver Differential Input Capacitance with Driver Disabled VA = 0.4 sin(30E6pt) +
0.5 V using HP4194A impedance analyzer (or equivalent);
VB = 1.2 V
3.0 pF
CA/B Transceiver Input Capacitance Balance with Driver Disabled, (CA/CB)
99 101 %
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
4. See Figure 3. DC Measurements reference.
5. Typ value at 25°C and 3.3 VCC supply voltage.
Table 6. DRIVER AC CHARACTERISTICS VCC = 3.3 ±10% V( 3.0 to 3.6 V), GND = 0 V, TA = −40°C to +85°C (Note 6)
Symbol
Characteristic
Min Typ Max
Unit
tPLH / tPHL Propagation Delay (See Figure 7)
1.0 1.5 2.4 ns
tPHZ / tPLZ Disable Time HIGH or LOW state to High Impedance (See Figure 8)
7 ns
tPZH / tPZL Enable Time High Impedance to HIGH or LOW state (See Figure 8)
7 ns
tSK(P)
Pulse Skew (|tPLH − tPHL|) (See Figure 7)
0 100 ps
tSK(PP) Device to Device Skew similar path and conditions (See Figure 7)
1 ns
tJIT(PER) Period Jitter RMS, 100 MHz (Source tr/tf 0.5 ns, 10 and 90 % points, 30k sam-
ples. Source jitter de−embedded from Output values ) (See Figure 10)
2 3 ps
tJIT(PP)
Peak−to−peak Jitter, 200 Mbps 215−1 PRBS (Source tr/tf 0.5 ns, 10 and 90%
points, 100k samples. Source jitter de−embedded from Output values) (See
Figure 10)
30 130 ps
tr / tf
Differential Output rise and fall times (See Figure 7)
1 1.6 ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
6. Typ value at 25°C and 3.3 VCC supply voltage.
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NB3N206S pdf, datenblatt
NB3N201S, NB3N206S
A. All input pulses are supplied by a generator having the following characteristics: tr or tf1 ns, frequency = 500 kHz, duty cycle = 50
±5%.
B. RL is 1% tolerance, metal film, surface mount, and located within 2 cm of the D.U.T.
C. CL is the instrumentation and fixture capacitance within 2 cm of the DUT and 20%.
Figure 13. Receiver Enable/Disable Time Test Circuit and Waveforms
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