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IW7032 Schematic ( PDF Datasheet ) - iWatt

Teilenummer IW7032
Beschreibung 32-Channel LED Driver
Hersteller iWatt
Logo iWatt Logo 




Gesamt 30 Seiten
IW7032 Datasheet, Funktion
iW7032
32-Channel LED Driver for LCD Panel Backlighting
1.0  Features
● Fully integrated power FET with minimum external
components
● Proprietary digital power management and patented
adaptive switch mode LED driver
● 32-channel output each at 56 V with 9 V to 28 V input
supply voltage range
● Dynamic external Boost or Buck controller interface to
optimize system power efficiency
● Serial Peripheral Interface (SPI) compatible for high
bandwidth PWM-based dynamic local dimming
● Per channel current up to 120 mA average current,
with non-adaptive-switch peak current of 120 mA for
local dimming and 192 mA for scanning mode, and with
adaptive-switch peak current up to 60% higher.
● LED failure (open and short-circuit) detection
● LED brightness local dimming, scanning, and 3D game
mode controlled by SPI interface
● PWM dimming range from 1% to 99.9% with 10-bit
resolution
● Vsync synchronized PWM
● PWM dimming frequency from 120Hz to 2.4 kHz in
NTSC; 100Hz to 2.4kHz in PAL; and 96Hz to 2.4kHz
in 3D game mode with 5-bit programmability in normal
mode.
● Over-temperature protection
● UVLO protection
● Green & Pb-free (RoHS compliant) BOM
2.0  Description
The iW7032 is a high efficiency driver for LEDs. It is designed
for use with mid- to large size LCD panels that use arrays
of LEDs as a backlight source. It is able to communicate
with up to two external step-up or step-down PWM DC-DC
converters to drive up to 32 separate strings of multiple
series-connected LEDs.
The iW7032 features dynamic output voltage control, which
automatically chooses the lowest active LED source voltage
to regulate the feedback voltage of a step-up or step-down
converter. Through this function, the iW7032 is able to
dynamically adjust the output voltage of up to two external
step-up or step-down converters to optimize the system
power efficiency.
The iW7032 also provides 32 constant current sinks with
maximum ±2% current matching. The LED PWM dimming
can be adjusted dynamically through a high bandwidth SPI
interface, which provides users flexibility to control the light
intensity of LEDs. In addition, users can provide versatile
configurations of the iW7032 through SPI interface registers.
The iW7032 can maintain very high efficiency even with the
existence of LED channel total forward voltage mismatch,
with the proprietary digital power management and patent
pending adaptive switch mode LED current regulation
technology.
The iW7032 has multiple features to protect the LED
channels from fault conditions, and these protections are
LED PWM cycle-by-cycle based to ensure system reliability
and provide consistent operation.
iW7032 is available in a low-profile, space-saving thermally
enhanced 10mm x 10mm TQFP-EP package.
3.0  Applications
● Edgelit Local Dimming for LED TV Backlit
● Direct & Segment-Edge LED Backlit LCDTV
● LCD Public Information Displays
Rev. 1.3
iW7032
Page 1






IW7032 Datasheet, Funktion
iW7032
32-Channel LED Driver for LCD Panel Backlighting
7.0 Electrical Characteristics (cont.)
VIN = 24 V, 0°C ≤ TA ≤ 85°C, unless otherwise specified
Parameter
Symbol Test Conditions
LDO3 LINEAR REGULATOR
Line regulation
Load regulation
Maximum output current
LDO5 LINEAR REGULATOR
Line regulation
Load regulation
Maximum output current
CURRENT GENERATION SECTION
9 V ≤ VIN ≤ 28 V, ILDO3 = 20 mA
VIN ≤ 24 V, ILDO3 = 20 mA
V > VLDO3
IN UVLO,ON
9 V ≤ VIN ≤ 28 V, ILDO5 = 5 mA
VIN ≤ 24 V, ILDO5 = 5 mA
V > VLDO5
IN UVLO,ON
Current balance
Per channel ILED = 120mA
LED channel current range,
local dimming (High side is
adaptive switch adjustable
range)
LED channel current range,
scanning mode (High side is
adaptive switch adjustable
range)
Current rise time
Current fall time
IPEAK, SINK
IPEAK, SINK
20% to 80% LED current,
dependent on PCB and LED
cable. Guaranteed by design
80% to 20% LED current,
dependent on PCB and LED
cable. Guaranteed by design
PWM linear dimming range
10-bit resolution
Min Typ Max Unit
165
165 300
60 100
mV
mV
mA
250
480 1150
5 10
mV
mV
mA
-2 2 %
32 192 mA
32 308 mA
100
100
1 99
ns
ns
%
PWM dimming range
PWM resolution
Number of strings
10-bit resolution
Minimum resolution required
to ensure smooth brightness
transitions
Desirable to run at high frequency
to avoid audible noise and
banding/shimmering (waterfall)
effects
0
10
99.9 %
bits
32
Rev. 1.3
iW7032
Page 6

6 Page









IW7032 pdf, datenblatt
iW7032
32-Channel LED Driver for LCD Panel Backlighting
to settle at its highest possible setting to start out the
calibration sequence.
At this point, after the Boost/Buck voltage is ramped up,
all the channels should indicate that they are in regulation
through their individual LDOs FORCE_ON signal. There is a
regulation detector on the LDO regulation loop that monitors
multiple voltage potentials to ensure that the regulation is
operating with enough loop gain for guaranteeing regulation
and best efficiency. When the loop gain falls below the
lower-bound limit threshold, this indicates that the channel is
about to go out of regulation due to not having enough Boost/
Buck voltage head room for that channel. With the Boost/
Buck voltage at the maximum level, all channels should be
in regulation, and therefore this regulation detector output
called FORCE_ON should not be true.
For each group, the VDAC is increased 4 LSB at a time at
2 millisecond intervals by default, in a ramp decreasing the
Boost/Buck voltage. This occurs until one channel within
the Boost/Buck group indicates that it is coming out of
regulation. This is sequentially done for every Boost/Buck
group.
Then the VDAC output is decreased which increases the
Boost/Buck voltage at 1 LSB per 2 millisecond interval, by
default, until the FORCE_ON comparator output deactivates.
This is also accomplished for each Boost/Buck group. With
2 Boost/Buck groups and 256 possible steps for each
one, the maximum time for this operation is just over 0.25
seconds, but will most often be shorter since each VDAC
does not need to ramp the full distance. The above estimate
is based on SISET being larger than or equal to ISET. If this
is not true, the time can, under some circumstances, be a
little longer.
After completing this function with the Scanning Mode ISET
current setting, the whole process of VDAC calibration is
repeated using the Local Dimming Mode current settings.
Once the VDAC calibration is completed, a similar function
occurs with each IDAC. IDAC is the digital value (4-bits)
that drives the DAC for each channel controlling the LDO
current for the adaptive switching operation. This DAC is
seen for each channel in figure 9.1. Initially all of the IDAC
settings for the individual LDO’s are set to 0, meaning that
each channel is set up to operate at the current specified by
the ISET bits in the SPI interface. Now that the Boost/Buck
voltage is set to its ideal point where the weakest channel
within the Boost/Buck group is in regulation. One-by-one,
each channel will be adjusted within the Boost/Buck group
by incrementing the IDAC value one bit at a time at 1 bit per
4.5 microseconds while again monitoring the FORCE_ON
comparator output to determine when the LDO transistor
moves deeper inside the triode region indicating that it is
about to go out of regulation due to the current demand
exceeding that which is feasible with the previously adjusted
boost voltage. After the FORCE_ON comparator activates,
then the IDAC value is reduced again by one step at a time
until it deactivates again.
The calibration can be bypassed by setting cali_cfg to be
HIGH. If calibration is bypassed, 2-set internal VDACs
for LD & SC are automatically loaded from VDAC_LD and
VDAC_SC. The control flow to bypass calibration is shown
below.
System Enable ICs
Initialization
IC Analog/Dig/ital
Wakeup
init_done
Software Initializes IC
control registers (include
cali_cfg bit) and vdac pre-load
registers through SPI interface
IC installs VDAC external
calibration value (for LD/SC)
into internal registers
Pre-calculation
Regular PWM
Cali_done
Enter regualar PWM mode
Firmware updates bri, OTF
adjustment performs
Real-time calculation
idac is updated,
re-kick off pre-
calculation
Figure 9.7.  Control Flow to Bypass Calibration
9.3  Channel Grouping
Channel grouping allows multiple LED ports on the iW7032
IC to be connected together to one string of LED’s at a
higher current rating at the cost of a reduction in number
of strings controlled by a single iW7032 IC. For example,
if the LED string current is to operate at 240 mA per string,
the channel grouping can be set to 2 while the LDO Iset
Rev. 1.3
iW7032
Page 12

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