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Teilenummer | PE42543 |
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Beschreibung | SP4T RF Switch | |
Hersteller | Peregrine Semiconductor | |
Logo | ||
Gesamt 14 Seiten Product Description
The PE42543 is a HaRP™ technology-enhanced
absorptive SP4T RF switch designed for use in Test/
ATE, microwave and other wireless applications. This
broadband general purpose switch is a pin-compatible
version of the PE42542 with faster switching time and
settling time. It exhibits low insertion loss, high isolation
and linearity performance from 9 kHz through 18
GHz. No blocking capacitors are required if DC voltage is
not present on the RF ports.
The PE42543 is manufactured on Peregrine’s
UltraCMOS® process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate.
Peregrine’s HaRP technology enhancements deliver high
linearity and excellent harmonics performance. It is an
innovative feature of the UltraCMOS process, offering the
performance of GaAs with the economy and integration
of conventional CMOS.
Figure 1. Functional Diagram
Product Specification
PE42543
UltraCMOS® SP4T RF Switch
9 kHz–18 GHz
Features
HaRP technology-enhanced
Fast settling time
No gate and phase lag
No drift in insertion loss and phase
Fast switching time of 500 ns
Low insertion loss
1.20 dB @ 3 GHz
2.30 dB @ 13.5 GHz
2.70 dB @ 16 GHz
3.20 dB @ 18 GHz
High isolation
55 dB @ 3 GHz
32 dB @ 13.5 GHz
28 dB @ 16 GHz
25 dB @ 18 GHz
ESD performance
2500V HBM on all pins
150V MM on all pins
250V CDM on all pins
Figure 2. Package Type
29-lead 4 4 mm LGA
DOC-62642
Document No. DOC-12314-2 │ www.psemi.com
©2013-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 14
PE42543
Product Specification
Typical Performance Data @ 25°C and VDD = 3.3V (ZS = ZL = 50Ω ), unless otherwise noted
Figure 5. Insertion Loss (RFC–RFX)
Figure 6. Insertion Loss vs. Temp (RFC–RFX)
Figure 7. Insertion Loss vs. VDD (RFC–RFX)
©2013-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 14
Document No. DOC-12314-2 │ UltraCMOS® RFIC Solutions
6 Page PE42543
Product Specification
Figure 21. Evaluation Board Schematic
50 OHM
J3
50 OHM
J5
50 OHM
J1
1
2
3
4
5
6
7
8
GND
RF2
GND
GND
GND
GND
RF4
GND
PE42543
R8
0 OHM
R6
DNI
R5
DNI
U1
GND
RF1
GND
GND
GND
GND
RF3
GND
23
22
21
20
19
18
17
16
R7
0 OHM
50 OHM
50 OHM
R1 DNI
R2 DNI
R3 DNI
R4 DNI
J13
VDD
1
3
5
7
9
11
13
1
3
5
7
9
11
13
2
4
6
8
10
12
14
2
4
6
8
10
12
14
C3 C4 C5 C6
DNI DNI DNI DNI
J4
C7
DNI
J2 50 OHM
J7 J6
THRU
DOC-12327
CAUTION: Contains parts and assemblies susceptible to damage by electrostatic discharge (ESD).
©2013-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 12 of 14
Document No. DOC-12314-2 │ UltraCMOS® RFIC Solutions
12 Page | ||
Seiten | Gesamt 14 Seiten | |
PDF Download | [ PE42543 Schematic.PDF ] |
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