CG7480AT Datasheet PDF - Cypress
| Part Number | CG7480AT | |
| Description | 8-Mbit (512 K x 16) Static RAM | |
| Manufacturers | Cypress | |
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CG7480AT
8-Mbit (512 K × 16) Static RAM
8-Mbit (512 K × 16) Static RAM
Features
■ Temperature ranges
❐ –40 °C to 125 °C
■ High speed
❐ tAA = 15 ns
■ Low active power
❐ ICC = 120 mA at 67 MHz
■ Low CMOS standby power
❐ ISB2 = 20 mA
■ 2.0-V data retention
■ Automatic power-down when deselected
■ Transistor-transistor logic (TTL)-compatible inputs and outputs
■ Easy memory expansion with CE and OE features
■ Available in Pb-free 44-pin thin small outline package
(TSOP) II.
Functional Description
The CG7480AT is a high performance CMOS Static RAM
organized as 512 K words by 16 bits.
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte LOW Enable (BLE) is LOW, then data
from I/O pins (I/O0–I/O7), is written into the location specified on
the address pins (A0–A18). If Byte HIGH Enable (BHE) is LOW,
then data from I/O pins (I/O8–I/O15) is written into the location
specified on the address pins (A0–A18).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte LOW Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on I/O0–I/O7. If
Byte HIGH Enable (BHE) is LOW, then data from memory
appears on I/O8 to I/O15. See the Truth Table on page 11 for a
complete description of read and write modes.
The input/output pins (I/O0–I/O15) are placed in a
high-impedance state when the device is deselected (CE HIGH),
the outputs are disabled (OE HIGH), the BHE and BLE are
disabled (BHE, BLE HIGH), or a write operation (CE LOW, and
WE LOW) is in progress.
The CG7480AT is available in a 44-pin TSOP II package with
center power and ground (revolutionary) pinout.
Logic Block Diagram
INPUT BUFFER
A0
A1
A2
AA34
AA56
512 K × 16
ARRAY
AA78
COLUMN
DECODER
I/O0–I/O7
I/O8–I/O15
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-73191 Rev. *A
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 4, 2014
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CG7480AT
Capacitance
Parameter [3]
Description
CIN
COUT
Input capacitance
I/O capacitance
Thermal Resistance
Parameter [3]
Description
JA Thermal resistance
(junction to ambient)
JC Thermal resistance
(junction to case)
Test Conditions
TA = 25C, f = 1 MHz, VCC = 3.3 V
Max Unit
12 pF
12 pF
Test Conditions
Still air, soldered on a 3 × 4.5 inch, four-layer printed circuit
board
TSOP II
Package
51.43
15.8
Unit
C/W
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms [4]
OUTPUT
Z = 50
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
50
1.5 V
High-Z Characteristics
3.3 V
R 317
(a)
30 pF*
3.0 V
GND
ALL INPUT PULSES
90%
90%
10%
10%
Rise Time: 1 V/ns
Fall Time: 1 V/ns
(b)
OUTPUT
5 pF
R2
351
(c)
Notes
3. Tested initially and after any design or process changes that may affect these parameters.
4. AC characteristics (except High-Z) are tested using the load conditions shown in Figure 2 (a). High-Z characteristics are tested for all speeds using the test load
shown in Figure 2 (c).
Document Number: 001-73191 Rev. *A
Page 5 of 16
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for CG7480AT electronic component. |
| Information | Total 16 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ CG7480AT.PDF Datasheet ] | |
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