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PDF CM3106 Data sheet ( Hoja de datos )

Número de pieza CM3106
Descripción 2 Amp Source / Sink Bus Termination Regulator
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No Preview Available ! CM3106 Hoja de datos, Descripción, Manual

CM3106
2 Amp Source/ Sink Bus
Termination Regulator
Product Description
The CM3106 is a sinking and sourcing regulator specifically
designed for providing power to DDR memory terminating resistors
and companion chip set VTT power. The output voltage accurately
tracks VDDQ/2. The CM3106 can source and sink current up to 2 A,
ideal for DDRI memory systems, and 1.2 A for DDRII systems,
while maintaining a load regulation of 0.5% in either application.
The CM3106 provides over current and over temperature protection
which protects the device from excessive heating due to high current
and high temperature. A shutdown capability using an external
transistor reduces power consumption and provides a high impedance
output.
The CM3106 is housed in an 8lead SOIC RoHScompliant
package.
Features
Ideal for DDRI and DDRII VTT Applications
Sinks and Sources 2.0A for DDRI
Over Current Protection
Over Temperature Protection
Integrated Power MOSFETs
Excellent Accuracy (0.5% Load Regulation)
Pin and Functionally Compatible with LP2995
8Lead SOIC Package
These Devices are PbFree and are RoHS Compliant
Applications
Single and Dual Channel DDR Memory Bus Termination
Active Termination Buses
Graphics Card Memory Termination
http://onsemi.com
8
1
SOIC8
SM SUFFIX
CASE 751
MARKING DIAGRAM
8
XXXXXX
AYWW
G
1
XXXXXX = CM310612SM
A = Assembly Location
Y = Year
WW = Work Week
G = PbFree Package
ORDERING INFORMATION
Device
Package
Shipping
CM310612SM SOIC8 2500/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
April, 2011 Rev. 3
1
Publication Order Number:
CM3106/D

1 page




CM3106 pdf
CM3106
PERFORMANCE INFORMATION (Cont’d)
Typical DC Characteristics (nominal conditions unless otherwise specified)
Figure 7. Over Current Limit (Source)
Figure 8. Load Transient (0 A to 2.0 A Sink)
Figure 9. Line Transient (0 A to 2.0 A Sink)
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