UJA1079TW Datasheet PDF - NXP Semiconductors
| Part Number | UJA1079TW | |
| Description | LIN core system basis chip | |
| Manufacturers | NXP Semiconductors | |
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UJA1079
LIN core system basis chip
Rev. 02 — 27 May 2010
Product data sheet
1. General description
The UJA1079 core System Basis Chip (SBC) replaces the basic discrete components
commonly found in Electronic Control Units (ECU) with a Local Interconnect Network
(LIN) interface.
The UJA1079 supports the networking applications used to control power and sensor
peripherals by using the LIN interface as a local sub-bus.
The core SBC contains the following integrated devices:
• LIN transceiver compliant with LIN 2.1, LIN 2.0 and SAE J2602, and compatible with
LIN 1.3
• Advanced independent watchdog (UJA1079/xx/WD versions)
• 250 mA voltage regulator for supplying a microcontroller; extendable with external
PNP transistor for increased current capability and dissipation distribution
• Serial Peripheral Pnterface (SPI) (full duplex)
• 2 local wake-up input ports
• Limp home output port
In addition to the advantages gained from integrating these common ECU functions in a
single package, the core SBC offers an intelligent combination of system-specific
functions such as:
• Advanced low-power concept
• Safe and controlled system start-up behavior
• Detailed status reporting on system and sub-system levels
The UJA1079 is designed to be used in combination with a microcontroller. The SBC
ensures that the microcontroller always starts up in a controlled manner.
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NXP Semiconductors
5. Pinning information
5.1 Pinning
UJA1079
LIN core system basis chip
i.c. 1
i.c. 2
TXDL 3
V1 4
RXDL 5
RSTN 6
INTN 7
EN 8
SDI 9
SDO 10
SCK 11
SCSN 12
i.c. 13
i.c. 14
TEST1 15
WDOFF 16
Fig 2. Pin configuration
UJA1079
32 BAT
31 VEXCTRL
30 TEST2
29 VEXCC
28 WBIAS
27 i.c.
26 DLIN
25 LIN
24 i.c.
23 GND
22 i.c.
21 i.c.
20 i.c.
19 WAKE2
18 WAKE1
17 LIMP
015aaa124
5.2 Pin description
Table 2.
Symbol
i.c.
i.c.
TXDL
V1
RXDL
RSTN
INTN
EN
SDI
SDO
SCK
SCSN
i.c.
i.c.
TEST1
WDOFF
LIMP
Pin description
Pin Description
1 internally connected; should be left floating
2 internally connected; should be left floating
3 LIN transmit data input
4 voltage regulator output for the microcontroller (5 V or 3.3 V depending on
SBC version)
5 LIN receive data output
6 reset input/output to and from the microcontroller
7 interrupt output to the microcontroller
8 enable output
9 SPI data input
10 SPI data output
11 SPI clock input
12 SPI chip select input
13 internally connected; should be left floating
14 internally connected; should be left floating
15 test pin; pin should be connected to ground
16 WDOFF pin for deactivating the watchdog
17 limp home output
UJA1079_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 May 2010
© NXP B.V. 2010. All rights reserved.
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