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PDF 74HC08D Data sheet ( Hoja de datos )

Número de pieza 74HC08D
Descripción high speed CMOS 2-INPUT AND GATE
Fabricantes Toshiba 
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CMOS Digital Integrated Circuits Silicon Monolithic
74HC08D
74HC08D
1. Functional Description
• Quad 2-Input AND Gate
2. General
The 74HC08D is a high speed CMOS 2-INPUT AND GATE fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The internal circuit is composed of 2-stages including buffer output, which provide high noise immunity and
stable output.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1) High speed: tpd = 6 ns (typ.) at VCC = 5 V
(2) Low power dissipation: ICC = 1.0 µA (max) at Ta = 25
(3) Balanced propagation delays: tPLH tPHL
(4) Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
4. Packaging
SOIC14
©2016 Toshiba Corporation
1
Start of commercial production
2016-05
2016-08-04
Rev.4.0

1 page




74HC08D pdf
74HC08D
11.3. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 )
Characteristics
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Input leakage current
Quiescent supply current
Symbol
VIH
Test Condition
VIL
VOH VIN = VIH or VIL
IOH = -20 µA
VOL VIN = VIH or VIL
IOH = -4 mA
IOH = -5.2 mA
IOL = 20 µA
IOL = 4 mA
IOL = 5.2 mA
IIN VIN = VCC or GND
ICC VIN = VCC or GND
VCC (V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
Min
1.50
3.15
4.20
1.9
4.4
5.9
3.7
5.2
Max Unit
V
0.50 V
1.35
1.80
V
0.1 V
0.1
0.1
0.4
0.4
±1.0 µA
40.0 µA
11.4. AC Characteristics
(Unless otherwise specified, CL = 15 pF, VCC = 5 V, Ta = 25 , Input: tr = tf = 6 ns)
Characteristics
Output transition time
Propagation delay time
Symbol
tTLH,tTHL
tPLH,tPHL
Test Condition
Min
Typ.
4
6
Max
8
12
11.5. AC Characteristics
(Unless otherwise specified, CL = 50 pF, Ta = 25 , Input: tr = tf = 6 ns)
Unit
ns
ns
Characteristics
Symbol Note VCC (V)
Min
Typ.
Max Unit
Output transition time
tTLH,tTHL
2.0 25 75 ns
4.5 7 15
6.0 6 13
Propagation delay time
tPLH,tPHL
2.0 24 75 ns
4.5 8 15
6.0 7 13
Input capacitance
CIN   3 pF
Power dissipation capacitance
CPD (Note 1)
7
pF
Note 1: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
ICC(opr) = CPD × VCC × fIN + ICC/4 (per gate)
©2016 Toshiba Corporation
5
2016-08-04
Rev.4.0

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