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74HC08PW Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer 74HC08PW
Beschreibung Quad 2-input AND gate
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 15 Seiten
74HC08PW Datasheet, Funktion
74HC08; 74HCT08
Quad 2-input AND gate
Rev. 5 — 30 November 2015
Product data sheet
1. General description
The 74HC08; 74HCT08 is a quad 2-input AND gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Complies with JEDEC standard JESD7A
Input levels:
For 74HC08: CMOS level
For 74HCT08: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74HC08D
40 C to +125 C
74HCT08D
74HC08DB 40 C to +125 C
74HCT08DB
74HC08PW 40 C to +125 C
74HCT08PW
74HC08BQ 40 C to +125 C
74HCT08BQ
Name
SO14
SSOP14
TSSOP14
DHVQFN14
Description
plastic small outline package; 14 leads; body width
3.9 mm
Version
SOT108-1
plastic shrink small outline package; 14 leads; body SOT337-1
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm






74HC08PW Datasheet, Funktion
NXP Semiconductors
74HC08; 74HCT08
Quad 2-input AND gate
Table 7. Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Figure 7.
Symbol Parameter
Conditions
Min
CPD power dissipation per package; VI = GND to VCC
capacitance
74HCT02
tpd propagation delay nA, nB to nY; see Figure 6
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
tt
transition time
VCC = 4.5 V; see Figure 6
CPD power dissipation per package;
capacitance
VI = GND to VCC 1.5 V
[3]
[1]
[2]
[3]
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
-
-
-
-
-
25 C
Typ
10
14
11
7
20
40 C to +125 C Unit
Max Max
Max
(85 C) (125 C)
--
- pF
24 30
--
15 19
--
36 ns
- ns
22 ns
- pF
11. Waveforms
9,
Q$Q%LQSXW
*1'
92+
Q<RXWSXW
92/
90
W3+/
9<
W7+/
90
9;
W3/+
W7/+
Fig 6.
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays
DDD
Table 8. Measurement points
Type
Input
74HC08
74HCT08
VM
0.5VCC
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
VY
0.9VCC
0.9VCC
74HC_HCT08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 30 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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74HC08PW pdf, datenblatt
NXP Semiconductors
74HC08; 74HCT08
Quad 2-input AND gate
13. Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC_HCT08 v.5
20151130
Product data sheet
-
74HC_HCT08 v.4
Modifications:
Type numbers 74HC08N and 74HCT08N (SOT27-1) removed.
74HC_HCT08 v.4
Modifications:
20120906
Product data sheet
-
74HC_HCT08 v.3
The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
74HC_HCT08 v.3
20030725
Product specification -
74HC_HCT08_CNV v.2
74HC_HCT08_CNV v.2 19970826
Product specification -
-
74HC_HCT08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 30 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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