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PDF PI4IOE5V9570 Data sheet ( Hoja de datos )
| Número de pieza | PI4IOE5V9570 | |
| Descripción | 4-bit general purpose outputs | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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PI4IOE5V9570
4-bit general purpose outputs for 1MHz I2C bus
Features
Operation power supply voltage from 2.3V to 5.5V
4-bit I2C-bus GPO
1 MHz I2C-bus interface with 30 mA SDA sink
capability for 4000pF
Latched outputs with 25mA capability for directly
driving LEDs
Software Reset; Power-on reset
Low standby current
ESD protection (4KV HBM and 1KV CDM)
Offered in two different packages:UQFN 1.6x1.6-
8,MSOP-8
Pin Configuration
Description
The PI4IOE5V9570 is a CMOS device that
provides 4bits of General Purpose parallel Output
(GPO) expansion in low voltage processor and
handheld battery powered mobile applications. It
operates at 1 MHz I2C-bus speeds while maintaining
backward compatibility to Fast-mode (400 kHz) and
Standard-mode (100 kHz).
The PI4IOE5V9570 is a streamlined GPO that
consists of 4-bit push-pull outputs that offer low
current consumption, small packaging options The
PI4IOE5V9570 output expander provides a simple
solution when additional outputs are needed while
keeping interconnections and floor space to a
minimum, for example, in battery powered mobile
applications where PCBs are crowded for interfacing
to sensors, push buttons, etc.
The PI4IOE5V9570 contains an internal Power-On
Reset (POR) and a Software Reset feature that
initializes the device to its default state.
Figure1 : MSOP-8
Figure2 : UQFN 1.6x1.6-8
2015-07-0044
PT0559
08/05/15
1
1 page  
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PI4IOE5V9570
4-bit general purpose outputs
for 1MHz I2C bus
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Dymaic Characteristics
Table 3: Dynamic characteristics
Symbol
Parameter
Test
Conditions
fSCL
tBUF
tHD;STA
tSU;STA
tSU;STO
tVD;ACK[1]
SCL clock frequency
bus free time between a STOP
and START condition
hold time (repeated) START
condition
set-up time for a repeated
START condition
set-up time for STOP
condition
data valid acknowledge time
tHD;DAT
tVD;DAT[2]
data hold time
data valid time
tSU;DAT data set-up time
tLOW LOW period of the SCL clock
tHIGH HIGH period of the SCL clock
tf
fall time of both SDA and SCL
signals
tr
rise time of both SDA and
SCL signals
pulse width of spikes that must
tSP[3]
be
suppressed by the input filter
Port timing
tv(Q) Data output valid time
Standard mode
I2C
Min Max
0 100
4.7 -
4.0 -
4.7 -
4.0 -
- 3.45
0
3.45
250 -
4.7 -
4.0 -
- 300
- 1000
- 50
200
Fast mode I2C
Min Max
0 400
1.3 -
0.6 -
0.6 -
0.6 -
- 0.9
0
- 0.9
100 -
1.3 -
0.6 -
- 300
- 300
- 50
200
Note:
[1] tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
[2] tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
[3] Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
1 MHz
I2C-bus
Min Max
Unit
0 1000 kHz
0.5 μs
0.26 μs
0.26 μs
0.26 μs
0.45 μs
ns
0.45 us
50 ns
0.5 μs
0.26 μs
- 120 ns
- 120 ns
- 50 ns
200 ns
2015-07-0044
PT0559
08/05/15
5
5 Page 
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UQFN-8(XT)
PI4IOE5V9570
4-bit general purpose outputs
for 1MHz I2C bus
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Ordering Information
Part No.
PI4IOEV9570UE
PI4IOE5V9570UE
PI4IOE5V9570XTEX
Note:
E = Pb-free and Green
Adding X Suffix= Tape/Reel
Package Code
U
U
XT
Package
8-Pin, Mini Small Outline Package(MSOP)
8-Pin, Mini Small Outline Package(MSOP),
Tape & Reel
8-pin UQFN 1.6x1.6, Tape & Reel
Pericom Semiconductor Corporation 1-800-435-2336 www.pericom.com
Pericom reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply
the best possible product. Pericom does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom product. The
company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom.
2015-07-0044
PT0559
08/05/15
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet PI4IOE5V9570.PDF ] | |
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