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PDF HWD2119 Data sheet ( Hoja de datos )
| Número de pieza | HWD2119 | |
| Descripción | 350mW Audio Power Amplifier | |
| Fabricantes | CSMSC | |
| Logotipo |  |
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HWD2119 Audio Power Amplifier
350mW Audio Power Amplifier with Shutdown Mode
General Description
Key Specifications
The HWD2119 is a mono bridged power amplifier that is ca-
pable of delivering 350mWRMS output power into a 16Ω load
or 300mWRMS output power into an 8Ω load with 10%
THD+N from a 5V power supply.
n THD+N at 1kHz, 350mW continuous average output
power into 16Ω
10% (max)
n THD+N at 1kHz, 300mW continuous average output
power into 8Ω
10% (max)
The HWD2119 audio power amplifier is designed specifically n Shutdown Current
0.7µA (typ)
to provide high quality output power and minimize PCB
area with surface mount packaging and a minimal amount
Features
of external components. Since the HWD2119 does not
require output coupling capacitors, bootstrap capacitors or
snubber networks, it is optimally suited for low-power por-
table applications.
n LLP, SOP, and MSOP surface mount packaging.
n Switch on/off click suppression.
n Unity-gain stable.
The closed loop response of the unity-gain stable HWD2119 n Minimum external components.
can be configured using external gain-setting resistors. The
device is available in LLP, MSOP, and SO package types to
Applications
suit various applications.
n General purpose audio
n Portable electronic devices
n Information Appliances (IA)
Typical Application
FIGURE 1. Typical Audio Amplifier Application Circuit
1
1 page  
Typical Performance Characteristics (Continued)
THD+N vs Frequency
THD+N vs Frequency
THD+N vs Frequency
THD+N vs Frequency
THD+N vs Output Power
THD+N vs Output Power
4
5 Page 
Application Information (Continued)
In order to eliminate ’clicks and pops’, all capacitors must be
discharged before turn-on. Rapidly switching VDD may not
allow the capacitors to fully discharge, which may cause
’clicks and pops’.
AUDIO POWER AMPLIFIER DESIGN EXAMPLE
The following are the desired operational
parameters:
Given:
Power Output
100mW
Load Impedance
16Ω
Input Level
1Vrms (max)
Input Impedance
20kΩ
Bandwidth
100Hz–20kHz ± 0.25dB
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. To find this
minimum supply voltage, use the Output Power vs. Supply
Voltage graph in the Typical Performance Characteristics
section. From the graph for a 16Ω load, (graphs are for 8Ω,
16Ω, and 32Ω loads) the supply voltage for 100mW of output
power with 1% THD+N is approximately 3.15 volts.
Additional supply voltage creates the benefit of increased
headroom that allows the HWD2119 to reproduce peaks in
excess of 100mW without output signal clipping or audible
distortion. The choice of supply voltage must also not create
a situation that violates maximum dissipation as explained
above in the Power Dissipation section. For example, if a
3.3V supply is chosen for extra headroom then according to
Equation (3) the maximum power dissipation point with a
16Ω load is 138mW. Using Equation (4) the maximum am-
bient temperature is 121˚C for the MUA08A package and
126˚C for the M08A package.
After satisfying the HWD2119’s power dissipation require-
ments, the minimum differential gain is found using Equation
(6).
The last step in this design example is setting the amplifier’s
-3dB frequency bandwidth. To achieve the desired ±0.25dB
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well with in the ±0.25dB
desired limit.
The results are:
fL = 100Hz/5 = 20Hz
fH = 20 kHz*5 = 100kHz
As mentioned in the External Components section, Ri and
Ci create a high pass filter that sets the amplifier’s lower
band pass frequency limit. Find the coupling capacitor’s
value using Equation (8).
Ci ≥ 1/(2πRifc) (F)
(8)
Ci ≥ 0.398µF, a standard value of 0.39µF will be used. The
product of the desired high frequency cutoff (100kHz in this
example) and the differential gain, AVD, determines the up-
per pass band response limit. With AVD = 1.27 and fH =
100kHz, the closed-loop gain bandwidth product (GBWP) is
127kHz. This is less than the HWD2119’s 900kHz GBWP. With
this margin the amplifier can be used in designs that require
more differential gain while avoiding performance restricting
bandwidth limitations.
(6)
Thus a minimum gain of 1.27 V/V allows the HWD2119 to
reach full output swing and maintain low noise and THD+N
performance. For this example, let AVD = 1.27. The amplifi-
er’s overall gain is set using the input (Ri) and feedback (RF)
resistors. With the desired input impedance set to 20kΩ, the
feedback resistor is found using Equation (7).
RF/Ri = AVD/2 (V/V)
The value of RF is 13kΩ.
(7)
11
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| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet HWD2119.PDF ] | |
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