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54F161A Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer 54F161A
Beschreibung Synchronous Presettable Binary Counter
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 10 Seiten
54F161A Datasheet, Funktion
November 1994
54F 74F161A  54F 74F163A
Synchronous Presettable Binary Counter
General Description
The ’F161A and ’F163A are high-speed synchronous modu-
lo-16 binary counters They are synchronously presettable
for application in programmable dividers and have two types
of Count Enable inputs plus a Terminal Count output for
versatility in forming synchronous multi-stage counters The
’F161A has an asynchronous Master-Reset input that over-
rides all other inputs and forces the outputs LOW The
’F163A has a Synchronous Reset input that overrides
counting and parallel loading and allows the outputs to be
simultaneously reset on the rising edge of the clock The
’F161A and ’F163A are high-speed versions of the ’F161
and ’F163
Features
Y Synchronous counting and loading
Y High-speed synchronous expansion
Y Typical count frequency of 120 MHz
Y Guaranteed 4000V minimum ESD protection
Commercial
Military
Package
Number
Package Description
74F161APC
N16E
16-Lead (0 300 Wide) Molded Dual-In-Line
54F161ADM (Note 2) J16A
16-Lead Ceramic Dual-In-Line
74F161ASC (Note 1)
M16A
16-Lead (0 150 Wide) Molded Small Outline JEDEC
74F161ASJ (Note 1)
M16D
16-Lead (0 300 Wide) Molded Small Outline EIAJ
54F161AFM (Note 2) W16A
16-Lead Cerpack
54F161ALM (Note 2) E20A
20-Lead Ceramic Leadless Chip Carrier Type C
74F163APC
N16E
16-Lead (0 300 Wide) Molded Dual-In-Line
54F163ADM (Note 2) J16A
16-Lead Ceramic Dual-In-Line
74F163ASC (Note 1)
M16A
16-Lead (0 150 Wide) Molded Small Outline JEDEC
74F163ASJ (Note 1)
M16D
16-Lead (0 300 Wide) Molded Small Outline EIAJ
54F163AFM (Note 2) W16A
16-Lead Cerpack
54F163ALM (Note 2) E20A
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Connection Diagrams
Pin Assignment
for DIP SOIC and Flatpak
’F161A
Pin Assignment
for LCC
’F161A
Pin Assignment
for DIP SOIC and Flatpak
’F163A
Pin Assignment
for LCC
’F163A
TL F 9486–1
TL F 9486 – 2
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9486
TL F 9486 – 7
TL F 9486 – 8
RRD-B30M75 Printed in U S A






54F161A Datasheet, Funktion
AC Electrical Characteristics
Symbol
Parameter
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPHL
tPHL
Maximum Count Frequency
Propagation Delay
CP to Qn (PE Input HIGH)
Propagation Delay
CP to Qn (PE Input LOW)
Propagation Delay
CP to TC
Propagation Delay
CET to TC
Propagation Delay
MR to Qn (’F161A)
Propagation Delay
MR to TC (’F161A)
74F
TA e a25 C
VCC e a5 0V
CL e 50 pF
Min Typ Max
100 120
35 55 75
3 5 7 5 10 0
40 60 85
40 60 85
5 0 10 0 14 0
5 0 10 0 14 0
25 45 75
25 45 75
5 5 9 0 12 0
4 5 8 0 10 5
54F
TA VCC e Mil
CL e 50 pF
Min Max
75
35 90
3 5 11 5
4 0 10 0
4 0 10 0
5 0 16 5
5 0 15 5
25 90
25 90
5 5 14 0
4 5 12 5
74F
TA VCC e Com
CL e 50 pF
Min Max
90
35 85
3 5 11 0
40 95
40 95
5 0 15 0
5 0 15 0
25 85
25 85
5 5 13 0
Units
MHz
ns
ns
ns
ns
4 5 11 5 ns
AC Operating Requirements
Symbol
Parameter
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(H)
tw(L)
tw(L)
trec
Setup Time HIGH or LOW
Pn to CP
Hold Time HIGH or LOW
Pn to CP
Setup Time HIGH or LOW
PE or SR to CP
Hold Time HIGH or LOW
PE or SR to CP
Setup Time HIGH or LOW
CEP or CET to CP
Hold Time HIGH or LOW
CEP or CET to CP
Clock Pulse Width (Load)
HIGH or LOW
Clock Pulse Width (Count)
HIGH or LOW
MR Pulse Width LOW
(’F161A)
Recovery Time
MR to CP (’F161A)
74F
TA e a25 C
VCC e a5 0V
Min Max
50
50
20
20
11 0
85
20
0
11 0
50
0
0
50
50
40
60
50
60
54F
TA VCC e Mil
Min
55
55
25
25
13 5
10 5
36
0
13 0
60
0
0
50
50
50
80
Max
50
60
74F
TA VCC e Com
Min
50
50
20
20
11 5
95
20
0
11 5
50
0
0
50
50
40
70
Max
50
60
Units
ns
ns
ns
ns
ns
ns
ns
6

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