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PDF JN5169 Data sheet ( Hoja de datos )
| Número de pieza | JN5169 | |
| Descripción | IEEE802.15.4 Wireless Microcontroller | |
| Fabricantes | NXP Semiconductors | |
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JN5169
IEEE802.15.4 Wireless Microcontroller
Rev. 1 — 5 August 2015
Product data sheet
1. General description
The JN5169 is an ultra low power, high performance wireless microcontroller suitable for
ZigBee applications. It features 512 kB embedded Flash, 32 kB RAM and 4 kB EEPROM
memory, allowing OTA upgrade capability without external memory. The 32-bit RISC
processor offers high coding efficiency through variable width instructions, a multi-stage
instruction pipeline and low-power operation with programmable clock speeds. It also
includes a 2.4 GHz IEEE802.15.4 compliant transceiver and a comprehensive mix of
analog and digital peripherals. The best in class RX operating current (down to 13 mA and
with a 0.7 A sleep timer mode) gives excellent battery life allowing operation direct from
a coin cell.
The peripherals support a wide range of applications. They include a 2-wire compatible
I2C-bus and SPI-bus which can operate as either master or slave, a 6-channel ADC with a
battery monitor and a temperature sensor. It can support a large switch matrix of up to 100
elements, or alternatively a 40-key capacitive touch pad.
2. Features and benefits
2.1 Benefits
Single chip device to run stack and application
Very low current solution for long battery life; over 10 years
Very low RX current for low standby power of mains powered nodes
Integrated power amplifier for long range and robust communication
High tolerance to interference from other 2.4 GHz radio sources
Supports multiple network stacks
Highly featured 32-bit RISC CPU for high performance and low power
Large embedded Flash memory to enable over-the-air firmware updates without
external Flash memory
System BOM is low in component count and cost
Flexible sensor interfacing options
Very thin quad flat 6 6 mm, 40 terminal package; lead-free and RoHS compliant
Temperature range: 40 C to +125 C
2.2 Features: radio
2.4 GHz IEEE802.15.4 compliant
RX current 14.7 mA, in low power receive mode 13 mA
Receiver sensitivity 96 dBm
Configurable transmit power, for example:
1 page  
NXP Semiconductors
6. Block diagram
JN5169
IEEE802.15.4 Wireless Microcontroller
XTAL
2.4 GHz
RADIO
INCLUDING
DIVERSITY
POWER
MANAGEMENT
Fig 1. Block diagram
WATCHDOG
TIMER
VOLTAGE
BROWNOUT
O-QPSK
MODEM
IEEE802.15.4
MAC
ACCELERATOR
128-BIT AES
ENCRYPTION
ACCELERATOR
RAM
32 kB
FLASH
512 kB
32-BIT
RISC CPU
4 kB
EEPROM
SPI-BUS
MASTER AND SLAVE
2-WIRE SERIAL
(MASTER/SLAVE)
4 X PWM
PLUS TIMER
2 X UART
20 DIO
PLUS 2 DO
SLEEP COUNTER
6 CHAN
10 BIT ADC
BATTERY AND
TEMP SENSORS
aaa-013126
JN5169
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 5 August 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
5 of 92
5 Page 
NXP Semiconductors
JN5169
IEEE802.15.4 Wireless Microcontroller
[2] JTAG programming mode: must be left floating high during reset to avoid entering JTAG programming mode.
[3] UART programming mode: leave pin floating high during reset to avoid entering UART programming mode or hold it low to program.
[4] Multi-function: DIO12/PWM2/CTS0/JTAG_TCK/ADO/SPISMOSI.
[5] Multi-function: DIO13/PWM3/RTS0/JTAG_TMS/ADE/SPISMISO.
[6] Multi-function: DIO14/SIF_CLK/TXD0/TXD1/JTAG_TDO/SPISEL1/SPISSEL.
[7] Multi-function: DIO15/SIF_D/RXD0/RXD1/JTAG_TDI/SPISEL2/SPISCLK.
The PCB schematic and layout rules detailed in Section 15.1 must be followed. Failure to
do so will likely result in the JN5169 failing to meet the performance specification detailed
in this data sheet and the worst case may result in the device not functioning in the end
application.
8.2.1 Power supplies
The device is powered from the VDDA and VDDD pins, each being decoupled with a 100 nF
ceramic capacitor. VDDA is the power supply to the analog circuitry; it should be decoupled
to ground. VDDD is the power supply for the digital circuitry; it should also be decoupled to
ground. In addition, a common 10 F tantalum capacitor is required for low frequencies.
Decoupling pins for the internal 1.8 V regulators are provided with each pin requiring a
100 nF capacitor located as close to the device as practical. VB_SYNTH and VB_DIG
require only a 100 nF capacitor. VB_RF1 and VB_RF2 should be connected together as
close to the device as practical, and require one 100 nF capacitor and one 47 pF
capacitor. The pin VB_VCO requires a 10 nF capacitor. See Figure 48 for a schematic
diagram.
VSSA and VSS are the ground pins.
Users are strongly discouraged from connecting their own circuits to the 1.8 V regulated
supply pins, as the regulators have been optimized to supply only enough current for the
internal circuits.
8.2.2 Reset
RESET_N is an active-low reset input pin that is connected to a 500 k internal pull-up
resistor. It may be pulled low by an external circuit. See Section 9.4.2 for more details.
8.2.3 32 MHz oscillator
A crystal is connected between XTAL_IN and XTAL_OUT to form the reference oscillator,
which drives the system clock. A capacitor to analog ground is required on each of these
pins. See Section 9.3.1 for more details. The 32 MHz reference frequency is divided down
to 16 MHz and this is used as the system clock throughout the device.
8.2.4 Radio
The radio is a single-ended design, requiring two capacitors and just two inductors to
match the 50 microstrip line to the RF_IO pin.
An external resistor (43 k) is required between IBIAS and analog ground (paddle) to set
various bias currents and references within the radio.
JN5169
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 5 August 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
11 of 92
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet JN5169.PDF ] | |
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