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PDF 74LVX125 Data sheet ( Hoja de datos )
| Número de pieza | 74LVX125 | |
| Descripción | Low-Voltage Quad Buffer | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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January 1996
74LVX125
Low-Voltage Quad Buffer with TRI-STATE Outputs
General Description
The LVX125 contains four independent non-inverting buff-
ers with TRI-STATE outputs The inputs tolerate voltages up
to 7V allowing the interface of 5V systems to 3V systems
Features
Y Input voltage level translation from 5V to 3V
Y Ideal for low power low noise 3 3V applications
Y Available in SOIC JEDEC SOIC EIAJ and TSSOP
packages
Y Guaranteed simultaneous switching noise level and dy-
namic threshold performance
Logic Symbol
Connection Diagram
IEEE IEC
Pin Assignment for
SOIC and TSSOP
TL F 12007 – 1
Truth Table
Pin Names
An Bn
On
Description
Inputs
Outputs
Inputs
An Bn
LL
LH
HX
H e HIGH Voltage Level
L e LOW Voltage Level
Z e High Impedance
X e Immaterial
Output
On
L
H
Z
Order Number
See NS Package Number
SOIC JEDEC
74LVX125M
74LVX125MX
M14A
SOIC EIAJ
74LVX125SJ
74LVX125SJX
M14D
TL F 12007 – 2
TSSOP
74LVX125MTC
74LVX125MTCX
MTC14
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1996 National Semiconductor Corporation TL F 12007
RRD-B30M17 Printed in U S A
http www national com
1 page  
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead (0 300 Wide) Molded Small Outline Package EIAJ
Order Number 74LVX125SJ or 74LVX125SJX
NS Package Number M14D
5 http www national com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74LVX125.PDF ] | |
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