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74HC131 Schematic ( PDF Datasheet ) - Hitachi Semiconductor

Teilenummer 74HC131
Beschreibung 3-to-8-line Decoder/Demultiplexer
Hersteller Hitachi Semiconductor
Logo Hitachi Semiconductor Logo 




Gesamt 8 Seiten
74HC131 Datasheet, Funktion
HD74HC131
3-to-8-line Decoder/Demultiplexer with Edge-Triggered
Address Registers
Description
The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register.
Address select data store to D type registers, during the positive going transition of the clock pulse.
Output control (G 1, G2) are independent of select input and CLK input, and when G1 is low or G2 = High,
all outputs is high.
Features
High Speed Operation: tpd (CLK to Y) = 20 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 V to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)






74HC131 Datasheet, Funktion
19.20
20.00 Max
16
9
1
1.3
1.11 Max
8
Unit: mm
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25
+
0.13
0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-16
Conforms
Conforms
1.07 g

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