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PDF 74HC423 Data sheet ( Hoja de datos )
| Número de pieza | 74HC423 | |
| Descripción | Dual retriggerable monostable multivibrator | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Rev. 6 — 19 December 2011
Product data sheet
1. General description
74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with
Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC423; 74HCT423 dual retriggerable monostable multivibrator with reset has two
methods of output pulse width control.
1. The minimum pulse width is essentially determined by the selection of an external
resistor (REXT) and capacitor (CEXT), see Section 12.1.
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made
as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQ output
HIGH and also inhibits the triggering. Figure 10 and Figure 11 illustrate pulse control
by reset.
The nA and nB inputs’ Schmitt trigger action makes them highly tolerant to slower input
rise and fall times.
The 74HC423; 74HCT423 are identical to the 74HC123; 74HCT123 except that they
cannot be triggered via the reset input.
2. Features and benefits
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100 % duty factor
Direct reset terminates output pulse
Schmitt-trigger action on all inputs except for the reset input
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and from 40 C to +125 C
1 page  
NXP Semiconductors
74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
6. Functional description
Table 3.
Input
nRD
L
X
X
H
Function table[1]
nA
X
H
X
L
H
nB
X
X
L
H
Output
nQ
L
L[2]
L[2]
nQ
H
H[2]
H[2]
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH transition;
= HIGH-to-LOW transition;
= one HIGH level output pulse;
= one LOW level output pulse.
[2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC supply voltage
IIK input clamping current
IOK output clamping current
IO output current
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
0.5 V < VO < VCC + 0.5 V
0.5
[1] -
[1] -
-
+7
20
20
25
V
mA
mA
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
DIP16 package
SO16, SSOP16, TSSOP16 and
DHVQFN16 packages
-
50
65
[2] -
[3] -
50
-
+150
750
500
mA
mA
C
mW
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 C the value of Ptot derates linearly at 12 mW/K.
[3] For SO16 packages: above 70 C the value of Ptot derates linearly at 8 mW/K;
For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K;
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K.
74HC_HCT423
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 19 December 2011
© NXP B.V. 2011. All rights reserved.
5 of 24
5 Page 
NXP Semiconductors
11. Waveforms
74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
VI
nB input
GND
VM
tW
VI
nA input
GND
VI
nRD input
GND
VOH
nQ output
VOL
VOH
nQ output
VOL
tPLH
VM
tW
tPHL
VM
tW
VM
tW
tW
VM
tPLH
tPHL (reset)
VY
tTLH
tPHL
VX
tTHL
VY
tPLH (reset)
VX
tTHL
tTLH
Fig 7.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Pulse widths, propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ) and
output transition times
tPLH
tPHL
001aah911
Table 8. Measurement points
Type
Input
74HC423
74HCT423
VI
VCC
3V
VM
0.5VCC
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
VY
0.9VCC
0.9VCC
74HC_HCT423
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 19 December 2011
© NXP B.V. 2011. All rights reserved.
11 of 24
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| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet 74HC423.PDF ] | |
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