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Teilenummer | 74HCT4066 |
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Beschreibung | Quad single-pole single-throw analog switch | |
Hersteller | NXP Semiconductors | |
Logo | ||
Gesamt 24 Seiten 74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
Rev. 8 — 3 December 2015
Product data sheet
1. General description
The 74HC4066; 74HCT4066 is a quad single pole, single throw analog switch. Each
switch features two input/output terminals (nY and nZ) and an active HIGH enable input
(nE). When nE is LOW, the analog switch is turned off. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Input levels nE inputs:
For 74HC4066: CMOS level
For 74HCT4066: TTL level
Low ON resistance:
50 (typical) at VCC = 4.5 V
45 (typical) at VCC = 6.0 V
35 (typical) at VCC = 9.0 V
Specified in compliance with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
NXP Semiconductors
74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
521
ȍ
9&& 9
DDD
9,+ Q(
Q<
9LV
96:
9&&
Q=
*1'
,6:
DDD
Fig 6.
Vis = 0 V to VCC
RON
=
V----S---W--
ISW
Test circuit for measuring RON
9
9
9LV9
Vis = 0 V to VCC
Fig 7. Typical RON as a function of input voltage Vis
Table 7. Static characteristics 74HC4066
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C
VIH HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
VIL LOW-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 9.0 V
II input leakage current
VI = VCC or GND
VCC = 6.0 V
VCC = 10.0 V
IS(OFF)
OFF-state leakage current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 8
per channel
IS(ON)
ON-state leakage current
VCC = 10.0 V; VI = VIH or VIL;
VSW = VCC GND; see Figure 9
Min Typ[1] Max Unit
1.5 1.2
-V
3.15 2.4
-V
4.2 3.2
-V
6.3 4.7
-V
- 0.8 0.5 V
- 2.1 1.35 V
- 2.8 1.80 V
- 4.3 2.70 V
- - 1.0 A
- - 2.0 A
- - 1.0 A
- - 1.0 A
74HC_HCT4066
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 3 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
6 of 24
6 Page NXP Semiconductors
74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
9,
QHJDWLYH
SXOVH
9
9,
SRVLWLYH
SXOVH
9
90
WI
WU
90
W:
W:
90
WU
WI
90
9&& 9LV
38/6(
*(1(5$725
9,
'87
9RV
57
5/
&/
9&&
6
RSHQ
*1'
DDJ
Test data is given in Table 12.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 12. Test circuit for measuring switching times
Table 12. Test data
Test
tPHL, tPLH
tPHZ, tPZH
tPLZ, tPZL
Input
Control E
VI[1]
GND
GND to VCC
GND to VCC
Switch Yn (Z)
Vis
GND to VCC
VCC
GND
[1] For 74HCT4066: maximum input voltage VI = 3.0 V.
tr, tf
6 ns
6 ns
6 ns
Output
Switch Z (Yn)
CL
50 pF
50 pF, 15 pF
50 pF, 15 pF
RL
-
1 k
1 k
S1 position
open
GND
VCC
74HC_HCT4066
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 3 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
12 of 24
12 Page | ||
Seiten | Gesamt 24 Seiten | |
PDF Download | [ 74HCT4066 Schematic.PDF ] |
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