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WM5102S Schematic ( PDF Datasheet ) - Wolfson Microelectronics

Teilenummer WM5102S
Beschreibung Audio Hub CODEC
Hersteller Wolfson Microelectronics
Logo Wolfson Microelectronics Logo 




Gesamt 30 Seiten
WM5102S Datasheet, Funktion
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WM5102S
Audio Hub CODEC with Master Hi-Fi DSP
DESCRIPTION
The WM5102S[1] is a highly-integrated low-power audio
system for smartphones, tablets and other portable audio
devices. It supports audiophile quality DAC playback on a
flexible, high-performance audio hub.
The WM5102S digital core provides a powerful combination
of fixed-function signal processing blocks with a
programmable DSP. These are supported by a fully-flexible,
all-digital audio mixing and routing engine with sample rate
converters, for wide use-case flexibility. The programmable
DSP supports a range of audio processing software
packages, including user-programmed solutions. A suite of
signal processing software packages is licensed as part of
the WM5102S product, though different audio algorithms
can also be implemented. Fixed-function signal processing
blocks include filters, EQ, dynamics processors and sample
rate converters.
A SLIMbus interface supports multi-channel audio paths and
host control register access. Multiple sample rates are
supported concurrently via the SLIMbus interface. Three
further digital audio interfaces are provided, each supporting
a wide range of standard audio sample rates and serial
interface formats. Automatic sample rate detection enables
seamless wideband/narrowband voice call handover.
Two stereo headphone drivers each provide stereo ground-
referenced or mono BTL outputs, with noise levels as low as
1µVRMS (HPOUT1) for hi-fi quality line or headphone output.
The CODEC also features stereo 2W Class-D speaker
outputs, a dedicated BTL earpiece output and PDM for
external speaker amplifiers. A signal generator for
controlling haptics devices is included; vibe actuators can
connect directly to the Class-D speaker output, or via an
external driver on the PDM output interface. All inputs,
outputs and system interfaces can function concurrently.
The WM5102S supports up to six microphone inputs, each
either analogue or PDM digital. Microphone activity
detection with interrupt is available. A smart accessory
interface supports most standard 3.5mm accessories.
Impedance sensing and measurement is provided for
external accessory and push-button detection.
The WM5102S power, clocking and output driver
architectures are all designed to maximise battery life in
voice, music and standby modes. Low-power ‘Sleep’ is
supported, with configurable wake-up events. The
WM5102S is powered from a 1.8V external supply. A
separate supply is required for the Class D speaker drivers
(typically direct connection to 4.2V battery).
Two integrated FLLs provide support for a wide range of
system clock frequencies. The WM5102S is configured using
the I2C, SPI or SLIMbus interfaces. The fully-differential
internal analogue architecture, minimal analogue signal
paths and on-chip RF noise filters ensure a very high degree
of noise immunity.
FEATURES
Audio hub CODEC with integrated DSP
Master Hi-Fi filters for audiophile quality DAC playback
Enhanced DRE processing (eDRE) for 120dB SNR
Fixed function signal processing functions
- Wind noise, sidetone and other high/low pass filters
- Dynamic Range Control, Fully parametric EQs
- Tone, Noise, PWM, Haptic control signal generators
Multi-channel asynchronous sample rate conversion
Integrated 6/7 channel 24-bit hi-fi audio hub CODEC
- 6 ADCs, 96dB SNR microphone input (48kHz)
- 7 DACs, 120dB SNR headphone playback (48kHz)
Audio inputs
- Up to 6 analogue or digital microphone inputs
- Single-ended or differential mic/line inputs
Multi-purpose headphone / earpiece / line output drivers
- 2 stereo output paths
- 29mW into 32load at 0.1% THD+N
- 100mW into 32BTL load at 5% THD+N
- 6.5mW typical headphone playback power consumption
- Pop suppression functions
- 1µVRMS noise floor (A-weighted, HPOUT1)
Mono BTL earpiece output driver
2 x 2W stereo Class D speaker output drivers
- Direct drive of external haptics vibe actuators
Two-channel digital speaker (PDM) interface
SLIMbus® audio and control interface
3 full digital audio interfaces
- Standard sample rates from 4kHz up to 192kHz
- Ultrasonic accessory function support
- TDM support on all AIFs
- 8 channel input and output on AIF1
Flexible clocking, derived from MCLKn, BCLKn or SLIMbus
2 low-power FLLs support reference clocks down to 32kHz
Advanced accessory detection functions
- Low-power standby mode and configurable wake-up
Configurable functions on 5 GPIO pins
Integrated LDO regulators and charge pumps
Support for single 1.8V supply operation
Small W-CSP package, 0.4mm pitch
APPLICATIONS
Smartphones and Multimedia handsets
Tablets and Mobile Internet Devices (MID)
Portable Music Players (PMP)
WOLFSON MICROELECTRONICS plc
Product Preview, April 2014, Rev 1.1
[1] This product is protected by Patents US 7,622,984, US 7,626,445, US 7,765,019 and GB 2,432,765
Copyright 2014 Wolfson Microelectronics plc






WM5102S Datasheet, Funktion
WM5102S
Product Preview
DRC SIGNAL DETECT SEQUENCES ........................................................................................................................................262 
SEQUENCER OUTPUTS AND READBACK...............................................................................................................................263 
PROGRAMMING A SEQUENCE ................................................................................................................................................263 
SEQUENCER MEMORY DEFINITION........................................................................................................................................264 
CHARGE PUMPS, REGULATORS AND VOLTAGE REFERENCE ...................................... 266 
CHARGE PUMPS AND LDO2 REGULATOR .............................................................................................................................266 
MICBIAS BIAS (MICBIAS) CONTROL ........................................................................................................................................266 
VOLTAGE REFERENCE CIRCUIT .............................................................................................................................................267 
LDO1 REGULATOR AND DCVDD SUPPLY...............................................................................................................................267 
BLOCK DIAGRAM AND CONTROL REGISTERS ......................................................................................................................268 
JTAG INTERFACE................................................................................................................... 273 
THERMAL SHUTDOWN.......................................................................................................... 273 
POWER-ON RESET (POR) AND HARDWARE RESET ........................................................ 274 
SOFTWARE RESET, WAKE-UP, AND DEVICE ID................................................................ 277 
REGISTER MAP ......................................................................................................... 279 
APPLICATIONS INFORMATION ............................................................................... 314 
RECOMMENDED EXTERNAL COMPONENTS..................................................................... 314 
ANALOGUE INPUT PATHS ........................................................................................................................................................314 
DIGITAL MICROPHONE INPUT PATHS ....................................................................................................................................314 
MICROPHONE BIAS CIRCUIT ...................................................................................................................................................315 
HEADPHONE/EARPIECE DRIVER OUTPUT PATH ..................................................................................................................316 
SPEAKER DRIVER OUTPUT PATH ...........................................................................................................................................318 
POWER SUPPLY / REFERENCE DECOUPLING ......................................................................................................................320 
CHARGE PUMP COMPONENTS ...............................................................................................................................................321 
EXTERNAL ACCESSORY DETECTION COMPONENTS ..........................................................................................................321 
RECOMMENDED EXTERNAL COMPONENTS DIAGRAM .......................................................................................................323 
RESETS SUMMARY ............................................................................................................... 324 
DIGITAL AUDIO INTERFACE CLOCKING CONFIGURATIONS ........................................... 325 
PCB LAYOUT CONSIDERATIONS......................................................................................... 329 
PACKAGE DIMENSIONS........................................................................................... 330 
IMPORTANT NOTICE ................................................................................................ 331 
ADDRESS: ............................................................................................................................... 331 
REVISION HISTORY .................................................................................................. 332 
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PP, April 2014, Rev 1.1
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WM5102S pdf, datenblatt
WM5102S
PIN NO
A1
NAME
IN3LN/
DMICCLK3
A2 IN3LP
B1 IN3RN/
DMICDAT3
B2
F13
E10
F11
H13
F12
C12
D12
C13
B13
E13
H12
H11
L10
K8
H2
H1
L2
L1
L9
M11
K6
K7
M12
D11
IN3RP
I¯R¯Q¯
JACKDET
LDOENA
MCLK1
MCLK2
MICBIAS1
MICBIAS2
MICBIAS3
MICDET1/
HPOUT1FB2
R¯¯E¯S¯E¯T¯
SLIMCLK
SLIMDAT
SPKCLK
SPKDAT
SPKOUTLN
SPKOUTLP
SPKOUTRN
SPKOUTRP
TCK
TDI
TDO
TMS
TRST
VREFC
POWER DOMAIN
MICVDD (analogue) /
MICVDD, MICBIAS1, MICBIAS2, MICBIAS3 (digital)
The DMICCLK3 power domain is selectable using IN3_DMIC_SUP
AVDD
MICVDD (analogue) /
MICVDD, MICBIAS1, MICBIAS2, MICBIAS3 (digital)
The DMICDAT3 power domain is selectable using IN3_DMIC_SUP
AVDD
DBVDD1
AVDD
DBVDD1
DBVDD1
DBVDD1
MICVDD
MICVDD
MICVDD
MICVDD (Microphone / Accessory detection) /
CPVDD (Ground noise rejection)
DBVDD1
DBVDD1
DBVDD1
DBVDD1
DBVDD1
SPKVDDL
SPKVDDL
SPKVDDR
SPKVDDR
DBVDD1
DBVDD1
DBVDD1
DBVDD1
DBVDD1
AVDD
Product Preview
GROUND DOMAIN
AGND
AGND
AGND
AGND
DGND
AGND
DGND
DGND
DGND
AGND
AGND
AGND
AGND
DGND
DGND
DGND
DGND
DGND
SPKGNDL
SPKGNDL
SPKGNDR
SPKGNDR
DGND
DGND
DGND
DGND
DGND
AGND
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PP, April 2014, Rev 1.1
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