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74LVC04A Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer 74LVC04A
Beschreibung Hex inverter
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 15 Seiten
74LVC04A Datasheet, Funktion
74LVC04A
Hex inverter
Rev. 9 — 17 November 2011
Product data sheet
1. General description
The 74LVC04A provides six inverting buffers. Inputs can be driven from either 3.3 V or 5 V
devices. This feature allows the use of these devices as translators in mixed 3.3 V
and 5 V applications.
2. Features and benefits
5 V tolerant inputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from 40 C to +85 C and 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LVC04AD 40 C to +125 C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74LVC04ADB 40 C to +125 C SSOP14
plastic shrink small outline package; 14 leads;
body width 5.3 mm
74LVC04APW 40 C to +125 C TSSOP14 plastic thin shrink outline package; 14 leads;
body width 4.4 mm
74LVC04ABQ 40 C to +125 C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
Version
SOT108-1
SOT337-1
SOT402-1
SOT762-1






74LVC04A Datasheet, Funktion
NXP Semiconductors
nA input
VI
GND
VOH
nY output
VOL
VM
t PHL
VM
VM
t PLH
VM
mna344
Fig 6.
VM = 1.5 V at VCC 2.7 V
VM = 0.5 VCC at VCC < 2.7 V
VOL and VOH are typical output voltage levels that occur with the output load.
The input (nA) to output (nY) propagation delays
74LVC04A
Hex inverter
74LVC04A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 17 November 2011
© NXP B.V. 2011. All rights reserved.
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74LVC04A pdf, datenblatt
NXP Semiconductors
13. Abbreviations
Table 9. Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
14. Revision history
Table 10. Revision history
Document ID
Release date
Data sheet status
Change notice
74LVC04A v.9
Modifications:
74LVC04A v.8
20111117
Product data sheet
-
Legal pages updated.
Table 6, bodyrow ICC: condition VCC changed.
20110926
Product data sheet
-
74LVC04A v.7
20110201
Product data sheet
-
74LVC04A v.6
20030904
Product specification -
74LVC04A v.5
20030224
Product specification -
74LVC04A v.4
20020308
Product specification -
74LVC04A v.3
19970630
Product specification -
74LVC04A v.2
19970630
Product specification -
74LVC04A v.1
19970203
Product specification -
74LVC04A
Hex inverter
Supersedes
74LVC04A v.8
74LVC04A v.7
74LVC04A v.6
74LVC04A v.5
74LVC04A v.4
74LVC04A v.3
74LVC04A v.2
74LVC04A v.1
-
74LVC04A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 17 November 2011
© NXP B.V. 2011. All rights reserved.
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