MC74AC109 PDF Datasheet

. U 4 Dual JK Positive t e Edge-Triggered Flip-Flop e h The MC74AC109/74ACT109 consists of two high – speed S transition clocked completely independent JK flip–flops. The clocking a t operation a is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip–flop (refer to .D MC74AC74/74ACT74 data sheet) by connecting the J and K i

MC74AC10, MC74ACT10 co Triple 3-Input t NAND Gate • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs m w w a D . w 14 1 S a t 13 e e h 12 4U . VCC 11 10 9 8 http://onsemi.com PDIP–14 N SUFFIX CASE 646 14 1 2 3 4 5 6 7 GND 14 Figure 1. Pinout: 14�

MC74AC10 MC74ACT10 Triple 3ĆInput NAND Gate • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 N SUFFIX CASE 646-06 PLASTIC 1 2 3 4 5 6 7 GND D SUFFIX CASE 751A-03 PLASTIC MAXIMUM RA

MC74AC11, MC74ACT11 co Triple 3-Input t AND Gate • Outputs Source/Sink 24 mA • ′ACT11 Has TTL Compatible Inputs m w w w .D VCC 14 13 12 11 10 9 8 a S a t e e h 4U . http://onsemi.com PDIP–14 N SUFFIX CASE 646 14 1 1 2 3 4 5 6 7 GND 14 Figure 1. Pinout: 14�

MC74AC125, MC74ACT125 Quad Buffer with 3-State Outputs High−Performance Silicon−Gate CMOS Features • Outputs Source/Sink • ′ACT125 Has TTL Compatible Inputs • These are Pb−Free Devices VCC A2 B2 O2 A3 B3 O3 14 13 12 11 10 9 8 1234567 A0 B0 O0 A1 B1 O1 GND Figure 1.

. U 4 NAND Schmitt Quad 2-Input t Trigger ee h The MC74AC/74ACT132 contains four 2–input NAND gates S which are capable of transforming slowly changing input signals into a t jitter–free output signals. In addition, they have sharply defined, a greater noise margin than conve