DP150EI PDF Datasheet

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Ultralow Noise, 150 mA CMOS Linear Regulator ADP150 FEATURES Ultra low noise: 9 μV rms, independent of VOUT No additional noise bypass capacitor required Stable with 1 μF ceramic input and output capacitors Maximum output current: 150 mA Input voltage range: 2.2 V to 5.5 V Low

CY2DP1502 1:2 LVPECL Fanout Buffer Features ■ ■ ■ ■ ■ ■ ■ ■ Functional Description The CY2DP1502 is an ultra-low noise, low-skew, low-propagation delay 1:2 LVPECL fanout buffer targeted to meet the requirements of high-speed clock distribution applications. The

CY2DP1504 1:4 LVPECL Fanout Buffer with Selectable Clock Input Features ■ ■ ■ ■ ■ ■ ■ ■ ■ Functional Description The CY2DP1504 is an ultra-low noise, low-skew, low-propagation delay 1:4 LVPECL fanout buffer targeted to meet the requirements of high-speed clock

FDP150N10 N-Channel PowerTrench® MOSFET July 2008 FDP150N10 100V, 57A, 15mΩ Features N-Channel PowerTrench MOSFET General Description This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especial

FDP150N10A — N-Channel PowerTrench® MOSFET FDP150N10A N-Channel PowerTrench® MOSFET 100 V, 50 A, 15 mΩ November 2013 Features • RDS(on) = 12.5 mΩ (Typ.) @ VGS = 10 V, ID = 50 A • Fast Switching Speed • Low Gate Charge, QG = 16.2 nC (Typ.) • High Performance Trenc