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Datasheet AD9142 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 2 | AD9142 | Digital-to-Analog Converter Data Sheet
FEATURES
Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion design 6-carrier GSM ACLR = 79 dBc at 200 MHz IF SFDR > 85 dBc (bandwidth = 300 MHz) at ZIF Flexible 16-bit LVDS interface Supports word and byte load Multiple chip synchronization |
 Analog Devices |
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| 1 | AD9142A | Digital-to-Analog Converter Data Sheet
Dual, 16-Bit, 1600 MSPS, TxDAC+ Digital-to-Analog Converter AD9142A
FEATURES
Supports input data rate up to 575 MHz Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion design
6-carrier GSM ACLR = 79 dBc at 200 MHz IF SFDR > 85 dBc (bandwidt |
Analog Devices |
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